ASIC/SoC Verification Engineer

Quick Facts

• Role: ASIC/SoC Verification Engineer

• Focus: Functional verification of ASICs and Systems-on-Chip (SoCs)

Description

Support the functional verification of ASICs and SoCs by performing moderately complex verification assignments using established methodologies. You will develop and modify UVM-based SystemVerilog testbenches, create directed and constrained-random tests, execute simulations and regression runs, and analyze failures and coverage to improve verification quality.

Responsibilities

• Review design specifications and implement assigned portions of block-level, subsystem, and full-chip verification plans

• Develop and modify SystemVerilog testbenches, test sequences, checkers, and functional coverage models within existing UVM environments

• Create directed and constrained-random tests to validate assigned design features, interfaces, and operating scenarios

• Execute simulations and regression tests; analyze logs and waveforms; investigate functional failures

• Collaborate with RTL designers to reproduce defects, verify corrections, and document results

• Analyze functional and code coverage, identify gaps, and implement additional tests with senior engineer review

• Maintain reusable verification components and implement approved improvements to existing verification infrastructure

• Support verification of embedded processors, CPU interfaces, and interactions between SoC components

• Coordinate with architecture, RTL design, FPGA, and emulation teams to clarify requirements and resolve assigned verification issues

• Report verification progress and escalate complex architectural or methodology issues to senior engineers

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a directly related field (or its foreign equivalent)

• Minimum of 2 years of experience in ASIC design verification

• Working knowledge of SystemVerilog, object-oriented programming, and UVM

• Experience developing/modifying testbenches and performing simulation, regression testing, debugging, and coverage analysis

• Understanding of digital logic, CPU or SoC architecture, and embedded-processor verification concepts

• Familiarity with verification workflows for large chip designs

• Strong analytical, problem-solving, documentation, and communication skills

Benefits

Not specified in the provided posting.