Formal Verification Engineer

Quick Facts

• Role: Formal Verification Engineer

• Focus: End-to-end formal verification for SoC design blocks and IPs (e.g., CPU/GPU, security, interconnect, power management)

Description

You will perform complete formal verification for one or more SoC design blocks and IPs, working with design teams to develop micro-architecture specifications and verification plans.

You will prove properties, find design bugs, and collaborate with engineers to improve the micro-architecture, including verifying unique security requirements.

You will also develop reusable, optimized formal models and architect correct-by-construction approaches to improve verification efficiency.

Responsibilities

• Develop formal micro-architecture specifications with Apple Silicon design engineers

• Create comprehensive formal verification test plans, including security requirement verification

• Prove design properties, identify bugs, and work with design teams to improve micro-architecture

• Model security attacks and prove robustness of complex design micro-architectures

• Develop and implement reusable, optimized formal models and verification code

• Create correct-by-construction verification methodologies to improve efficiency and productivity

Requirements

• Bachelor’s degree

• Minimum 3 years of relevant industry experience in silicon validation software engineering or related field

• Knowledge and experience interpreting hardware specifications

• Proficiency in a scripting language with excellent debugging skills

• Detail-oriented approach and drive to overcome challenges

• Excellent interpersonal skills

• Passion for developing world-class, innovative formal verification solutions

Benefits

• Opportunity to learn from a world-class formal verification team and be central to SoC verification efforts

• Work at the core of high-quality functional product delivery to millions of customers quickly