FPGA Verification Engineer

Quick Facts

• Focus: RTL/FPGA verification for cryptographic algorithms and crypto processors
• Scope: block and subsystem verification plans, reusable modular test environments
• Collaboration: works with ASIC backend team

Description

Design and maintain FPGA verification plans at block and subsystem level for cryptographic algorithms and processors. Build reusable modular test environments and simulation setups for complex IP blocks, perform functional and code coverage analysis, and resolve verification/design issues with engineering partners while maintaining technical documentation. This is a highly autonomous technical role.

Responsibilities

• Create and maintain verification plans for blocks and subsystems
• Design and implement reusable modular test environments
• Build simulation environments for verifying complex IP blocks
• Perform functional analysis and code coverage analysis
• Debug and resolve design and verification problems in collaboration with engineers
• Maintain technical documentation (test plans, coverage reports, bug logs)
• Collaborate with the ASIC backend team

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field
• At least 5 years of FPGA verification/design experience (Mid) or 8+ years (Senior)
• Fluent in VHDL, Verilog, or SystemVerilog for RTL verification
• Knowledge of the ASIC design process
• Experience with VUnit, cocotb, or UVM
• Ability to work independently and in a cross-functional team
• Strong analytical skills and problem-solving ability

Benefits

• Participate in projects advancing the security foundations of integrated circuits
• Flexible working hours
• Stock options
• Broad technical responsibility and strong growth opportunities