Senior ASIC Design Engineer

Quick Facts

• Role: Senior ASIC Design Engineer

Description

Design and develop FPGA, digital ASIC, and/or mixed-signal ASIC solutions using HDL, verification methodologies, and signoff analyses for advanced space-based communication systems.

Responsibilities

• Design and develop FPGAs, digital ASICs, and/or mixed-signal ASICs
• Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog)
• Develop verification methodologies and test benches for block and system-level verification
• Create and execute test plans, develop test harnesses, and implement coverage models
• Conduct timing analysis, noise analysis, and other signoff checks
• Collaborate with systems, firmware, architecture, and product engineering teams
• Support lab integration and troubleshooting
• Resolve design issues and drive solutions for timing, congestion, and other implementation challenges

Requirements

• 7+ years of experience in ASIC design and implementation
• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical discipline
• Experience with FPGA & ASIC design
• Proficiency in HDL programming (VHDL, Verilog, and/or SystemVerilog)
• Experience with Linux development environment
• Experience with design verification and test bench development

Benefits

Inclusive, safety-focused engineering culture and collaboration.