ASIC/SoC Verification Engineer

Galaxy i Technologies, Inc.

Sunnyvale, CA • 57m ago • On-site

Mid

On-site

70 - 80 USD/yr

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Potential salary for ASIC/SoC Verification Engineer role

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$70 – $80/year

Quick Facts

  • Role: Verification Engineer – ASIC/SoC

Description

Support the functional verification of ASICs and SoCs. Implement assigned portions of block-level, subsystem, and full-chip verification plans, using established methodologies under general supervision.

Responsibilities

  • Review design specifications and implement assigned verification-plan portions.

  • Develop and modify SystemVerilog testbenches, test sequences, checkers, and functional coverage models within existing UVM environments.

  • Create directed and constrained-random tests to validate design features, interfaces, and operating scenarios.

  • Execute simulations and regression tests; analyze logs and waveforms to investigate functional failures.

  • Collaborate with RTL designers to reproduce defects, verify corrections, and document results.

  • Analyze functional and code coverage, identify gaps, and implement additional tests (with senior engineer review).

  • Maintain reusable verification components and implement approved improvements to verification infrastructure.

  • Support verification of embedded processors, CPU interfaces, and interactions between SoC components.

  • Coordinate with architecture, RTL design, FPGA, and emulation teams to clarify requirements and resolve verification issues.

  • Report verification progress and escalate complex architectural/methodology issues to senior engineers.

Requirements

  • Bachelor’s degree in electrical engineering, computer engineering, computer science, or a directly related field (or equivalent foreign degree).

  • Minimum of 2 years of experience in ASIC design verification.

  • Working knowledge of SystemVerilog, object-oriented programming, and UVM.

  • Experience developing/modifying testbenches, performing simulation, regression testing, debugging, and coverage analysis.

  • Understanding of digital logic, CPU/SoC architecture, and embedded-processor verification concepts.

  • Familiarity with verification workflows for large chip designs.

  • Strong analytical, problem-solving, documentation, and communication skills.

Benefits

Not specified in the provided posting.

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