Principal ASIC Packaging Design Engineer

Quick Facts

• Role: Principal ASIC Packaging Design Engineer

Description

Lead end-to-end ASIC package architecture and execution for high-performance mixed-signal and digital SoCs, focused on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. Own the full packaging strategy from early architecture and trade studies through vendor engagement, qualification, and production ramp, acting as the technical authority for first-pass success on complex high-speed, power-dense ASICs. Co-optimize die floorplans and package interfaces with silicon, RF, and systems teams while driving SI/PI and thermal outcomes.

Responsibilities

• Own ASIC package architecture for FC-BGA and MCM: substrate stack-up, ball-map strategy, power delivery, signal breakout, and mechanical constraints

• Lead package-level trade studies for cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability

• Define the packaging roadmap for future ASIC nodes, bandwidth scaling, and multi-die integration

• Establish package design standards, methodologies, and best practices

• Drive detailed design for FC-BGA packages for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content

• Define/review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning

• Partner with silicon, RF, and systems teams to co-optimize die floorplans and package interfaces

• Own package-level SI/PI strategy including high-speed digital interfaces (SerDes, JESD, Interlaken), PDN design, and decoupling

• Lead package-level thermal architecture: lid selection, TIMs, heat-spreaders, and system cooling mechanical interfaces

• Manage external packaging vendors, substrate suppliers, and OSATs: qualification, capability assessment, contract negotiation, and performance/quality scorecarding

• Drive material selection, substrate technology choices, and assembly process optimization

Requirements

• Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or related field

• 10+ years of ASIC package design experience with deep expertise in FC-BGA

• Proven experience delivering high-pin-count, high-performance ASIC packages into production

• Strong understanding of substrate technologies/materials, SI/PI fundamentals, and thermal management for power-dense ASICs

• Fluency with SI/PI and EM simulation tools (SIWave, HFSS, ADS)

• Experience working directly with OSATs and substrate vendors

• Knowledge of packaging qualification and test methodologies

Benefits

• Base salary range: $200,000–$280,000 + equity

• Comprehensive benefits: paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and other perks