
Senior ASIC Package Design Engineer
K2 Space
17m ago • Remote
Senior
Remote
180,000 - 260,000 USD/yr
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Potential salary for Senior ASIC Package Design Engineer role
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$180,000 – $260,000/year
Quick Facts
- Role: Senior ASIC Package Design Engineer (FC-BGA / MCM)
Description
You will implement and own advanced ASIC package architecture for high-performance mixed-signal and digital SoCs, centered on flip-chip BGA (FC-BGA) and multi-chip module (MCM) solutions. The role spans end-to-end package strategy—from early architecture and trade studies to vendor engagement, qualification, and production ramp—aimed at achieving first-pass success for complex, high-speed, power-dense ASICs.
Responsibilities
- Define ASIC package architecture for FC-BGA and MCM (substrate stack-up, ball-map strategy, power delivery, signal breakout, mechanical constraints)
- Lead package-level trade studies across cost, performance, power integrity (PI), signal integrity (SI), thermal, manufacturability, and reliability
- Establish package design standards, methodologies, and best practices
- Drive detailed FC-BGA design for high-pin-count ASICs with high-speed SerDes, dense power grids, and RF signal content
- Define/review substrate stack-ups, via strategies, impedance control, escape routing, and reference plane planning
- Co-optimize die floorplans and package interfaces with silicon, RF, and systems teams
- Own package-level SI/PI strategy, including PDN design and decoupling strategy
- Lead package thermal architecture (lid selection, TIMs, heat-spreaders, and mechanical interfaces to system cooling)
- Partner with packaging vendors, substrate suppliers, and OSATs; optimize materials, substrate technology choices, and assembly processes
Requirements
- Bachelor’s degree in Packaging Engineering, Mechanical Engineering, Electrical Engineering, or related field
- 5+ years of ASIC package design experience with deep FC-BGA expertise
- Proven delivery of high-pin-count, high-performance ASIC packages into production
- Strong understanding of substrate technologies/materials and package-level SI/PI plus thermal management for power-dense ASICs
- Proficiency with SI/PI and EM simulation tools such as SIWave, HFSS, and ADS
- Hands-on experience working directly with OSATs and substrate vendors
- Knowledge of packaging qualification and test methodologies
Benefits
- Base salary range: $180,000–$260,000 + equity
- Comprehensive benefits: paid time off, medical/dental/vision coverage, life insurance, paid parental leave, and other perks
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