Sr. FPGA/ASIC Hardware Engineer

Quick Facts

• Role: Sr. FPGA/ASIC Hardware Engineer
• Location: Cincinnati, OH

Description

Design and debug FPGA and associated hardware and microcontroller products, from requirements analysis and architecture definition through verification and performance profiling. Develop Verilog HDL targeting antifuse and enhanced Flash FPGAs, and analyze functional issues with accompanying firmware in test environments. Contribute to process improvements to maintain hardware–firmware quality and accelerate time-to-market.

Responsibilities

• Analyze requirements and define architecture for FPGA and related hardware and microcontroller products
• Design and debug FPGA hardware and associated hardware/firmware
• Develop Verilog HDL targeting antifuse and enhanced Flash FPGAs
• Perform functional issue analysis and performance profiling with hardware and firmware in test environments or target host systems
• Support process improvements to ensure hardware–firmware quality and time-to-market

Requirements

• Bachelor’s degree with at least 6 years of relevant experience OR graduate degree with at least 4 years OR 10+ years relevant experience in lieu of a degree

Preferred Additional Skills

• Verilog for logic design
• Embedded C programming for algorithms, data structures, and optimized code
• Lab tools experience: logic analyzers, oscilloscopes, JTAG/ICE debuggers, protocol analyzers
• Familiarity with hardware/software/firmware development methodologies (design verification, code reviews, unit testing, prototyping, product testing)
• Version control: Subversion (SVN), Git, or TFS
• Digital design principles and HDL experience (Verilog, VHDL)
• SystemVerilog verification experience using AVM, VMM, OVM, or UVM (a plus)
• C# bare-metal microcontroller development (a plus)
• Strong English communication skills; action-oriented and organized; ability to handle short-notice requests