Senior FPGA/Prototype Design Engineer

Quick Facts

• Role: Senior FPGA/Prototype Design Engineer

• Focus: ASIC validation through FPGA prototyping, emulation, and post-silicon bring-up

Description

The Senior FPGA/Prototype Design Engineer partners with the Design Validation team to ensure ASIC designs are fully validated. You work with design, verification, and software teams to accelerate software development, enable early hardware integration, and support post-silicon bring-up.

Responsibilities

• Develop and maintain ASIC to FPGA retargeting flows, including resource constraints, clock rate reductions, and memory retargeting.

• Deliver FPGA prototype platforms covering multiple design configurations, top levels, and release qualification.

• Qualify commercial emulation platforms for release and assess test case compatibility and coverage partitioning against simulation.

• Reproduce and debug prototype and emulation failures with design and verification teams through resolution.

• Build portable platform environments spanning block and top level, RTL and gate, pre-silicon and silicon.

• Support post-silicon bring-up using shared pre-silicon bench and simulation platforms.

• Accelerate software development and early hardware integration through prototype releases and documented feature limitations.

• Support internal platform users through triage, documentation, and direct technical assistance.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related technical discipline.

• 7+ years of experience in FPGA prototyping, emulation, or digital design verification.

• Experience with FPGA implementation tools and flows, including synthesis, constraints, and timing closure.

• Experience developing and debugging production RTL in SystemVerilog or Verilog authored by others.

• Experience defining FPGA prototype or emulation flows, including build automation and release management.