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September 19, 2026
Principal Electrical Design Engineer
Senior • On-site
185,000 - 240,000 USD/yr
San Jose, CA
Apply now
Quick Facts
Principal Electrical Design Engineer for board hardware engineering, defining and driving the architecture and electrical design strategy for next-generation networking and high-performance connectivity platforms (chassis boards, NIC cards, PCIe Gen6 platforms, and 800G Ethernet products).
Description
Own the technical roadmap and board-level architecture across multiple programs. You will lead power delivery and schematic/PCB design for complex multi-layer boards, set bring-up/validation/debug strategy, and serve as the top technical authority across cross-functional teams from concept through production.
Responsibilities
- Define and own board-level hardware architecture and technical roadmap across product lines and platform generations
- Establish design standards, methodologies, and best practices scalable across the hardware organization
- Drive architectural tradeoffs for complex multi-layer PCBs integrating high-speed digital, analog, and mixed-signal circuitry
- Lead SI work such as stack-up strategy and impedance optimization
- Own power delivery architecture (multi-rail regulation topologies, advanced sequencing, transient response optimization, protection philosophies, power budgeting)
- Define management/control interface architectures (I2C, SPI, GPIO, MDIO) and debug/observability architectures
- Own schematic capture and board-level design for complex multi-layer PCBs
- Provide technical authority/oversight and approvals for schematic capture and board-level designs
- Develop component strategy and qualification roadmaps with suppliers, sourcing, and manufacturing teams
- Drive design-for-excellence initiatives: DFT, DFM, and DFR
- Define and own bring-up and validation strategy; improve first-pass success rates
- Lead root-cause analysis for escalated hardware issues across high-speed interfaces, PDN, clocks/resets, and control paths
- Improve debug methodologies, validation coverage, and failure analysis processes
- Partner with firmware, software, and system teams to define/validate initialization sequences, telemetry, diagnostics, and platform-level functionality
- Own corrective action frameworks and feed lessons learned into design standards and reviews
- Escalate and decide on hardware design challenges; resolve cross-domain technical conflicts
- Work strategically with silicon vendors/ASIC teams on architecture, bring-up, errata resolution, compliance, and next-generation readiness
- Mentor and develop senior/lead engineers; lead and contribute to design reviews and technical publications
- Represent the hardware engineering organization in executive reviews and industry/customer engagements as needed
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering or closely related field (advanced degree preferred)
- 12+ years of progressive board-level hardware design experience with demonstrated technical leadership
- Production hardware architecture/delivery experience for server, networking, storage, or high-performance compute systems at scale
- Expert experience with high-speed SerDes systems supporting Ethernet, PCIe, or related protocols
- Deep hands-on experience with PCIe Gen5/Gen6 and 400G/800G Ethernet system design
- Signal integrity fundamentals: impedance control, differential pair routing, channel loss optimization, crosstalk mitigation, and layout review
- Power integrity/PDN expertise: advanced sequencing, decoupling strategies, transient response optimization, and system-level power architecture tradeoffs
- Proficiency with schematic capture and PCB design/review tools such as Cadence Allegro or OrCAD
- Track record leading hardware bring-up and debug using oscilloscopes, protocol analyzers, and advanced lab instrumentation
- Proven ability to lead cross-functional teams and influence technical direction across organizational boundaries
- Strong mentoring record elevating engineering team capabilities
Benefits
- Base pay range: $185,000 - $240,000 (based on location, experience, and compensation benchmarks)
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