SoC Hardware Power Management Validation Engineer

Quick Facts

• Role: SoC Hardware Power Management Validation Engineer (post-silicon)
• Focus: Validate and debug power management features and optimize power, performance, and thermals

Description

Own post-silicon validation and debug of power management features across CPU cores, mesh, memory, I/O, package, and platform power domains. Develop and execute validation strategies for power states, DVFS, idle/active power management, thermal management, and performance-per-watt optimization—driving root-cause analysis and feature readiness. Define validation requirements, test plans, automation frameworks, and debug/telemetry solutions while partnering with architecture, firmware, verification, and system software teams.

Responsibilities

• Validate and debug power management features across multiple SoC and platform domains
• Create validation strategies for power, idle/active behavior, thermal, and performance-per-watt targets
• Perform root-cause analysis across silicon, firmware, hardware, and software issues
• Define validation requirements, test plans, methodologies, automation frameworks, and debug tools
• Lead silicon bring-up, feature characterization, workload-based validation, and power-performance correlation
• Analyze power/performance/thermal telemetry to identify bottlenecks and optimize platform efficiency
• Use post-silicon learnings to influence pre-silicon verification coverage and debug approaches
• Provide technical leadership/mentoring and drive continuous improvement in validation infrastructure and tooling

Requirements

• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year technical engineering experience; OR Bachelor’s degree AND 2+ years technical engineering experience; OR equivalent experience
• Meet security screening requirements, including passing the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter
• Provide proof of citizenship or US residency/other protected status to access export-controlled information

Benefits

• Base pay range (U.S.): USD $102,100–$202,200 (San Francisco Bay area and NYC metro: USD $133,800–$219,200)
• Eligible for benefits and other compensation (per Microsoft pay/benefits information)
• Position open for a minimum of 5 days; applications accepted on an ongoing basis until filled