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October 22, 2026
IC Verification Engineer
Senior
121,900 - 195,000 USD/yr
San Jose, CA
Quick Facts
Role: IC Verification Engineer
Description
Develop verification test plans and functional coverage for block/core/SOC features. Architect and build scalable, reusable verification test benches using a verification methodology framework, including pseudo-random tests. Debug regression failures, analyze functional coverage gaps, and improve tests; lead verification strategy documentation and reviews.
Responsibilities
Develop test plans for all features for Block/Core/SOC and write functional coverage
Architect and develop scalable and reusable test benches using verification methodology framework
Build pseudo-random tests to achieve full functional coverage
Debug regression failures; analyze coverage gaps and improve tests to cover gaps
Lead documentation of verification strategy (test plans, verification environment, pseudo-random tests)
Lead reviews with design/architecture and drive verification quality/efficiency improvements
Requirements
Bachelor’s degree in Electrical Engineering or related field with 8+ years relevant experience, or Master’s degree with 6+ years relevant experience
6+ years writing and debugging complex test benches
Deep understanding of verification across testbenches, test plans, pseudo-random tests, and functional coverage
Proficiency in SystemVerilog and verification methodologies such as UVM/VMM/OVM
Exceptional command of object-oriented programming principles
Knowledge of a complex protocol such as PCIe or other multi-layered protocols
Ability to work independently and deliver
PCI Express knowledge is desired
Benefits
Discretionary annual bonus
New hire equity grant and annual equity awards (subject to plan documents and agreements)
Medical, dental, and vision plans
401(K) with company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company-paid holidays; paid sick leave and vacation
Paid Family Leave and other leaves of absence per applicable law
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