Senior SoC Integration Engineer

Quick Facts

• Role: Senior SoC Integration Engineer

Description

Own SoC implementation and integration strategies, ensuring RTL quality and timeliness while refining area, power, and performance. Integrate functional blocks into the SoC FPGA, write basic tests, and perform debug at both IP and SoC levels. Lead gate-level simulation and perform design quality checks including Lint, CDC, RDC, and Low Power Intent, working closely with verification to ensure design quality.

Responsibilities

• Own SoC implementation and integration strategies

• Collaborate with SoC Integration and IP Design Engineers to ensure RTL quality and timeliness

• Continuously assess and refine implementation for area, power, and performance

• Integrate functional blocks into the SoC FPGA

• Write basic tests and perform debug for features at IP and SoC levels

• Lead the gate-level simulation team to meet goals on time with high quality

• Perform design quality checks: Lint, CDC, RDC, Low Power Intent

• Partner with the verification team to ensure design quality

Requirements

• PhD (Electrical Engineering/Computer Engineering/Computer Science or related) + 1+ year technical engineering experience, or

• Master’s + 4+ years, or

• Bachelor’s + 5+ years, or equivalent experience

• Ability to meet security screening requirements (including Microsoft Cloud Background Check at hire and every two years)

• Ability to access export-controlled information; citizenship/residency eligibility verification required

Benefits

• Base pay range (U.S.): USD $119,800–$234,700/year; San Francisco Bay Area and NYC metro: USD $160,200–$261,000/year

• Eligible for benefits and other compensation (additional details available via the listed pay/benefits page)