Silicon Design Engineer

Quick Facts

• Role: Silicon Design Engineer (AI System on Chip / AISoC)

Description

You will join the SoC design team working on high-performance, high-bandwidth silicon for AI workloads. Responsibilities span IP microarchitecture specification, RTL design, SoC integration (clocking and resets), and synthesis/static checks (including lint and clock/reset domain crossings). You will collaborate across architecture, verification, and physical design teams to ensure the design is implemented and verified to specification.

Responsibilities

• Develop IP microarchitecture specifications
• Perform RTL design
• Support SoC integration, including clocking and resets
• Run synthesis and static checks (e.g., lint, domain crossing checks)
• Coordinate with architecture, verification, and physical design teams throughout implementation and verification

Requirements

• Master’s degree in EE/CE/CS (or related) with 1+ years technical engineering experience, or Bachelor’s degree with 2+ years, or equivalent experience
• Meet security screening requirements, including passing the Microsoft Cloud Background Check and re-screening every two years
• Provide documented proof of citizenship or US residency/protected status to access export-controlled information

Benefits

• Base pay range (U.S.): USD $102,100–$202,200 per year; other ranges for specific locations (e.g., San Francisco Bay Area and NYC metro)
• Eligible roles may receive additional benefits and compensation