Senior Staff CAD Engineer

Quick Facts

• Role: Senior Staff CAD Engineer (CAD/EDA tool and design flow development)

Description

Lead the development of next-generation automated design flow and add-on tools for physical verification. Develop and maintain CAD/EDA tools and methodologies, integrate EDA tools into a cohesive flow, and automate verification tasks to streamline physical verification and SoC tapeout. Create validation procedures, user guides, and validation test cases based on results from full custom layout tools.

Responsibilities

• Develop run sets for nanotechnology and support Calibre; provide user support for physical verification debugging
• Automate and support 3rd-party IP onboarding on physical verification signoff for internal design groups
• Support tape-out and foundry interface activities, physical verification CAD flow, and CAD flows for SoC integration
• Develop and maintain validation procedures for the physical verification flow; prepare user guides and documents
• Develop and maintain advanced CAD and EDA tools and methodologies for digital and analog IC design, verification, and physical implementation
• Integrate various EDA tools into an efficient and cohesive, interoperable design flow to maximize productivity
• Define and optimize design methodologies, flows, and best practices from physical verification to SoC tapeout
• Automate physical verification flow, design rule decks, and layout migration to improve efficiency and reduce time-to-market
• Evaluate and select third-party EDA tools, libraries, and IPs based on performance, scalability, and cost-effectiveness
• Collaborate cross-functionally (foundry, design, layout, software); provide technical guidance and training
• Monitor and optimize tool performance, ensuring reliability, stability, and usability
• Stay up to date with CAD/EDA advancements and recommend incorporating new technologies

Requirements

• Bachelor’s degree in Computer Science, Electrical Engineering, or related field plus 5+ years relevant experience OR Master’s/PhD plus 3 years relevant experience
• Minimum 5 years of experience in CAD and EDA tool development and support (preferably semiconductor industry)
• In-depth hands-on knowledge of industry-standard EDA tools and methodologies for digital and analog IC design, verification, and physical implementation
• Proficiency with Cadence, Synopsys, Mentor Graphics and scripting languages such as Tcl, Perl, Python
• Synopsys ICV required
• Mentor Calibre svrf/tvf preferred
• Strong understanding of end-to-end IC design flow: RTL/synthesis/simulation through place-and-route, timing analysis, and physical verification
• Proven ability to analyze complex design and tool issues, propose solutions, and drive them to completion
• Strong communication and collaboration skills with cross-functional teams
• Leadership experience mentoring junior engineers and leading initiatives
• Continuous learning mindset and passion for innovation

Benefits

• Eligible to participate in bonus and equity plans (new hire equity grant and annual equity refresh)
• Employee stock purchase plan with a 2-year look back
• Family support programs
• Robust mental health resources
• Recognition and service awards