Senior Research Scientist, Superconducting Qubit Measurement, Quantum AI

🏢 Summary: Lead manufacturing test engineering for hardware systems, managing a team and developing scalable test strategies, automation, and process improvements. The role addresses complex product failures through RCCA, data collection, and manufacturing-process qualification for server, storage, and networking hardware. 🗂️ Requirements: Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent engineering experience, 10 years of test engineering experience in electronics manufacturing, 8 years of people management experience, Python, Bash, and Shell scripting experience for product-specific test plans and test execution 📃 Skills: Python, Bash, Shell, RCCA, ICT, BSCAN 🏢 Description: Minimum qualifications • Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent engineering experience. • 10 years of experience in Test Engineering in electronics manufacturing. • 8 years of experience in people management. • Experience coding in Python, Bash, and Shell scripting to generate product-specific test plans and execute testing accordingly. Preferred qualifications • Experience in manufacturing, quality, or product engineering for hardware technology and systems. • Experience working with server, storage, and networking products, especially AI and ML servers, racks, and integration. • Experience with test station bring-up, gauge R&R/correlation, and partner or agreement manufacturing (ODM, OEM, JDM). • Experience managing manufacturing test hardware using custom electronics, fixturing, instrumentation, and defining test strategy, test automation, test optimization, and scaling test capacity. • Experience with design for test and structural tests such as ICT/BSCAN, Board- and System-level Functional Tests. • Ability to drive improvement of test systems and processes for scaling test capacity. About the job Join a team developing custom silicon solutions that support direct-to-consumer hardware products. Contribute to next-generation hardware experiences focused on performance, efficiency, and integration, while supporting the technical infrastructure behind data centers, platforms, and networks. Responsibilities • Lead a team; set and communicate individual and team priorities that support organizational goals. • Meet regularly with individuals to discuss performance and development, and provide feedback and coaching. • Apply Root Cause Corrective Action (RCCA) fundamentals and collaborate with teams to analyze failures and resolve issues. • Define and execute data-collection activities for highly complex technical issues. • Drive process design, optimization, and qualification activities for manufacturing processes involving components, parts, or products.

🏢 Summary: AI research role focused on developing and evaluating frontier models, building state-of-the-art evaluation datasets, and guiding research projects from design through release. The position includes publishing research, managing timelines and resources, and analyzing how offline evaluations relate to live production performance. 🗂️ Requirements: PhD in Computer Science, related field, or equivalent practical experience, 2 years leading a research agenda, 1 year of data science experience, Experience training, testing, evaluating, and tuning AI models, Experience managing LLM release cycles and timelines 📃 Skills: AI, LLM, Python, Datasets, Evaluation, Testing, Tuning, Coding 🏢 Description: Minimum qualifications • PhD in Computer Science, a related field, or equivalent practical experience • 2 years of experience leading a research agenda • 1 year of experience in a data science field • Experience with AI model training, testing, evaluation, and tuning processes, as well as LLM release cycles and timeline management Preferred qualifications • 2 years of coding experience • 1 year of experience leading research efforts and influencing other researchers About the job Artificial intelligence will be one of humanity’s most transformative inventions. DeepMind is a pioneering AI lab with interdisciplinary teams focused on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users. The work emphasizes widespread public benefit, scientific discovery, safety, and ethics, and offers learning opportunities and varied career pathways for people driven to achieve results through collective effort. Responsibilities • Author research papers to share and generate impact from research results across functions and in the research community • Drive project work by defining data structures, frameworks, designs, and evaluation metrics for research solution development and implementation; identify timelines and obtain needed resources • Identify gaps in existing release evaluations and create new state-of-the-art datasets that push frontier models to their limits • Build a deeper understanding of the relationship between static evaluations and live production traffic

🏢 Summary: Design and develop high-speed I/O, interconnect, PCIe, high-power connector, and Ethernet cable solutions. The role covers cable architecture, tolerance and FEA analysis, specifications, cross-functional collaboration, and supplier prototype development for production-ready products. 🗂️ Requirements: Bachelor’s degree in Mechanical Engineering, Product Design, or related field, or equivalent practical experience, 3 years of experience designing mechanical components or assemblies, 3 years of experience using CAD tools 📃 Skills: CAD, MCAD, NX, Creo, Solidworks, PCIe, Ethernet, FEA 🏢 Description: Minimum Qualifications • Bachelor’s degree in Mechanical Engineering, Product Design, or a related field, or equivalent practical experience. • 3 years of experience designing mechanical components, including plastic or metal parts, mechanical assemblies, printed circuit boards, or flexes. • 3 years of experience using computer-aided design (CAD) tools, such as 3D MCAD, NX, Creo, or Solidworks. Preferred Qualifications • Master’s degree in Mechanical Engineering, Product Design, or a related field, or equivalent practical experience. • 3 years of work experience in consumer product design. • Experience shipping multiple consumer products. • Experience collaborating with suppliers around the world on part manufacturing and final assembly, including onsite factory support. • Experience with multiple manufacturing methods used in consumer products. • System integration experience, including electro-mechanical components such as audio, display, camera, and antenna; waterproofing; thermals; grounding; or product architecture. About the Job Lead the development of high-speed I/O and interconnect cables and connectors. Concept and design next-generation cable families to meet expanding needs for internal and external PCIe solutions, and support a growing portfolio of high-power connector solutions. Responsibilities • Design Ethernet electrical cables to meet and exceed industry specifications, and drive multi-source development of cable solutions that meet interoperability requirements. • Perform tolerance analysis and Finite Element Analysis (FEA) on mating designs. • Develop thorough cable specifications covering electrical and mechanical performance, quality, ergonomics, and serviceability in collaboration with a broad cross-functional team. • Drive suppliers to provide functioning prototypes for early evaluation; identify and resolve design weaknesses in supplier product offerings to meet requirements.

🏢 Summary: Staff CAD Engineer role focused on architecting, developing, and deploying the CI2 silicon design environment for next-generation TPU and AI/ML hardware. The position improves silicon development flows, iteration speed, and power, performance, cost, and quality outcomes through advanced tooling and cross-functional collaboration. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, related field, or equivalent practical experience, 10 years of technical leadership experience in critical silicon-design areas, Experience in at least two silicon disciplines, Experience developing and deploying advanced tools and development flows for the silicon lifecycle, Ability to lead design-environment architecture, development, and deployment, Knowledge of silicon development phases and scalable design flows 📃 Skills: Silicon, TPU, CI2, AI/ML, DFT, Synthesis, Verification, Firmware, Architecture, Modeling, Place-and-route, Timing, APIs 🏢 Description: Minimum qualifications • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. • 10 years of experience in technical leadership focusing on one or more critical aspects of silicon design. • Experience in two or more silicon disciplines, including architecture modeling, logic design, functional verification, DFT, synthesis, place and route, timing analysis, physical verification, or firmware development. • Experience developing and deploying advanced tools and development flows that streamline the silicon lifecycle and improve engineering productivity. Preferred qualifications • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. • 15 years of relevant academic and industrial experience in advanced silicon development. • Experience identifying the need for a silicon methodology change, developing a solution, and successfully deploying it with impact to more than 25 developers. • Experience developing solutions that require bridging knowledge gaps among collaborators. • Experience collaborating in internal or external ecosystem standardization efforts. • Knowledge of both front-end silicon development processes—architecture, logic design, and verification—and back-end processes—logic synthesis, place and route, timing convergence, and physical verification. About the job Shape the future of AI/ML hardware acceleration by driving TPU technology for demanding AI/ML applications. Develop custom silicon solutions and use design and verification expertise to verify complex digital designs, with a focus on TPU architecture and its integration within AI/ML-driven systems. As a Staff CAD Engineer, Silicon Design Environment, collaborate with domain experts across the silicon development spectrum to deliver the development environment for chips powering next-generation cloud systems. Refine ambiguous intent into solutions and rally others to develop or deploy them. Responsibilities • Use knowledge of silicon development phases to define the architecture and lead the development and deployment of the overall CI2 design environment as a coherent system of first-party and third-party tools, industry-standard and internal APIs/data formats, and scalable design flows. • Collaborate with technical leaders across CI2 sites to identify evolutionary and revolutionary tooling and methodology changes that enable convergence on a shared design environment. • Engage with other internal teams to keep CI2 at the forefront of advanced silicon development. • Ensure developed technologies optimize project iteration speed while achieving planned power, performance, cost, and quality metrics. • Partner with tools and methodologies team members to apply procedural and AI-first approaches that improve efficiency.

🏢 Summary: Research-focused Software Engineer role advancing large language model and information retrieval capabilities for Gemini, Search, and related products. The position combines model evaluation, multi-stage training and practical modeling innovations, with deployment of research advances alongside Search and YouTube teams. 🗂️ Requirements: Bachelor’s degree in Computer Science, Data Science, Artificial Intelligence, Machine Learning, a related technical field, or equivalent practical experience, 3 years of machine learning experience focused on Large Language Models or Information Retrieval, 3 years of software engineering experience using Python, C++, JAX, or PyTorch, Experience implementing multi-stage training pipelines or algorithms 📃 Skills: Python, C++, JAX, PyTorch, LLMs, IR, MachineLearning 🏢 Description: Minimum qualifications • Bachelor's degree in Computer Science, Data Science, Artificial Intelligence, Machine Learning, or a related technical field, or equivalent practical experience. • 3 years of experience in machine learning, with a focus on Large Language Models (LLMs) or Information Retrieval (IR). • 3 years of experience with software engineering in Python, C++, JAX, or PyTorch programming, including experience implementing multi-stage training pipelines or algorithms. Preferred qualifications • Experience developing Reinforcement Learning (RL) algorithms, automated evaluation systems, or LLM reflection and reasoning frameworks. • Experience with competitive programming, mathematics competitions (e.g., ICPC, IOI, IMO), or a track record of developing novel algorithms. • Experience rapidly prototyping and iterating on complex systems, generative AI models, or multi-stage pipelines. • Experience collaborating with product engineering teams to deploy machine learning models or research innovations into large-scale production environments (e.g., Search, Recommendation Systems). • Track record of learning new software tools, frameworks, and codebases quickly to solve complex technical obstacles. About the job Research-focused Software Engineers create experiments, prototype implementations, and design new architectures for real-world challenges such as artificial intelligence, data mining, natural language processing, hardware and software performance analysis, compilers for mobile platforms, and core search. The role includes large-scale testing and rapid deployment of promising ideas, while contributing to the wider research community through university partnerships and published papers. Responsibilities • Uncover strategic opportunities at the intersection of Gemini, Search, factuality, continual learning, deep research, and domain internalization. • Analyze models and model-driven products beyond current leaderboards; understand complex problem spaces and create new ways to measure ideal behavior. • Use empirical findings to develop practical interventions and modeling innovations that improve models across downstream surfaces. • Collaborate with product teams such as Search and YouTube to scale research innovations into production environments, optimizing for quality and efficiency.

🏢 Summary: Senior Chip Package SI/PI Engineer role supporting TPU-based AI/ML hardware acceleration. The position drives chip-package-system co-design, simulations, characterization, methodology development, and electrical design closure for advanced 2.5D/3D packages. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, related field, or equivalent practical experience, 10 years of chip/package or system PCB SI/PI design experience, Experience with industry SI/PI modeling toolchains, SI/PI simulation and characterization experience at package and system level, Cross-functional collaboration with chip, board, system, and vendor teams 📃 Skills: HFSS, ADS, Sigrity, Siwave, SIPI, PCB, TPU, ASIC, Python, Matlab, C++, STA, EMIR, DFM 🏢 Description: Minimum qualifications: • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. • 10 years of experience with SI/PI design for chip/package or system PCB. • Experience with industry Signal Integrity and Power Integrity (SI/PI) modeling toolchains, such as HFSS, ADS, Sigrity, and Siwave. Preferred qualifications: • Master’s degree or PhD in Electrical Engineering or SI/PI. • Experience in 2.5D/3D package design, including silicon interposer, silicon bridge, and 3D die stacking technologies, with SI/PI analysis expertise for high-speed interconnects. • Knowledge of next-generation memory and chiplet standards, including timing budgets and design and sign-off methodologies. • Understanding of Static Timing Analysis, on-chip DVD/EMIR, system voltage budgets, and voltage regulator modeling and design. • Ability to lead cross-functionally across chip design, physical design, STA, packaging, system, and validation teams. • Proficiency in Python, Matlab, or C++ for automation flows and advanced data processing and analysis. In this role, you will help shape AI/ML hardware acceleration and drive TPU technology for demanding AI/ML applications. You will develop custom silicon solutions and contribute design and verification expertise for complex digital designs, with a focus on TPU architecture and its integration in AI/ML-driven systems. As a Chip Package Signal Integrity/Power Integrity (SI/PI) Engineer on the chip implementation team, you will be responsible for chip-package design, SI/PI simulation, and characterization at package and system level. You will work with system architects, ASIC engineers, SI/PI engineers, chip and board design teams, system design teams, and vendors to deliver chip packaging signal and power implementations that meet chip, package, and system electrical requirements. • Drive chip-package-system co-design through SI/PI analysis and optimization, contributing to product definition and optimizing chip floorplans, power-tree structures, and netlists for HPC using 2.5D/3D package technology. • Develop power-integrity methodologies for advanced package technology and improve methodology accuracy and productivity. • Evaluate new package technologies and high-speed interface IP. • Collaborate with chip design, system design, and supplier teams to establish chip-package SI/PI targets, define chip-design boundaries, and explore SI/PI and DFM trade-offs for package design closure in production. • Provide feedback on chip floorplans based on package and system routability and SI/PI considerations.

🏢 Summary: Lead foundational UX research for generative AI products, shaping long-term product strategy and model behavior. The role partners with research, product, and operations teams to translate user evidence into AI evaluation frameworks, including measures for trust, agency, and hallucination tolerance. 🗂️ Requirements: Bachelor’s degree in Human-Computer Interaction, Psychology, Cognitive Science, related field, or equivalent practical experience, 8 years of experience in UX research, product strategy, or a related consumer technology field, Qualitative research experience, Quantitative research experience 📃 Skills: UX, AI, RLHF, Research, Analytics 🏢 Description: Minimum qualifications • Bachelor's degree in Human-Computer Interaction, Psychology, Cognitive Science, or a related field, or equivalent practical experience. • 8 years of experience in User Experience Research, Product Strategy, or a related field within consumer-facing technology. • Experience in qualitative and quantitative research methods. Preferred qualifications • Experience working on systems such as AI, search, algorithmic feeds, or cloud platforms where the user experience is driven by machine learning. • Experience influencing executive stakeholders and managing product changes through evidence-based narratives. Description Artificial intelligence will be one of humanity’s most transformative inventions. The role focuses on advancing AI development to solve complex global challenges and accelerate high-quality product innovation for billions of users, with safety and ethics as priorities. Responsibilities • Identify the next wave of user needs in generative AI. • Move beyond tactical testing to lead foundational research that informs the multi-year product roadmap. • Define the signals used for model tuning through Reinforcement Learning from Human Feedback (RLHF) to ensure the AI’s personality and reasoning align with user expectations. • Partner with Research, Product Management, and Strategy and Operations to integrate user insights into core business and technical strategy. • Develop and scale new frameworks for evaluating AI. • Pioneer ways to measure complex concepts such as hallucination tolerance, creative agency, and collaborative trust that traditional UX metrics often miss.

🏢 Summary: Lead the end-to-end architecture of DRAM memory subsystems and controllers for consumer SoCs, driving performance, power, area, and hardware-software co-design. The role includes defining specifications, evaluating designs through modeling and simulation, and partnering with design, verification, emulation, and software teams on next-generation memory technologies. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience, 15 years of industry experience in memory controller architecture, microarchitecture, or ASIC design, Experience designing DRAM memory controller architectures and microarchitectures, Experience with ASIC performance analysis, performance tools, and simulator development across abstraction levels 📃 Skills: DRAM, ASIC, SoC, TLM, C, DDR 🏢 Description: Minimum Qualifications • Bachelor’s degree in Electrical Engineering, Computer Science, Computer Engineering, or equivalent practical experience. • 15 years of industry experience in memory controller architecture, micro-architecture, or ASIC design. • Experience in architecture, micro-architecture, and design of DRAM memory controllers. • Experience in ASIC architecture performance analysis, performance tools, and simulator development at different abstraction levels, such as cycle-accurate, TLM, or functional. Preferred Qualifications • Master’s degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. • Deep domain knowledge in coherent interconnects, caches, fabrics, memory systems, and memory controllers. • Understanding of hardware performance monitors, profiling, power management, and optimization. Description Shape the future of DRAM memory subsystem and controller architecture for consumer SoCs. Bring together the architectural responsibilities for memory subsystems and memory controllers to drive architectural alignment, performance optimization, and hardware-software co-design. Collaborate with hardware designers, validation teams, and software architects to build and test technologies. Work on memory system innovation using developments in DDR, process-in-memory, and other emerging DRAM advancements. Responsibilities • Define and maintain the end-to-end architectural strategy across memory subsystems and memory controllers for consumer SoCs. • Lead performance, power, and area trade-off analyses, feature design, clocking, and power-state management across memory IPs. • Author comprehensive hardware architectural specifications, system-level design requirements, and programmer guides for next-generation memory controllers. • Evaluate architectural choices by developing C models, executing workload simulations, and collaborating with verification and emulation teams. • Serve as the primary technical contact for memory path latency, power optimization, and performance across cross-functional engineering teams.

🏢 Summary: Senior Performance Co-Design Engineer role focused on analyzing and optimizing LLM serving performance on custom ML accelerators. The position develops simulation, profiling, and modeling tools, partners across hardware and software teams, and informs future TPU and cloud silicon architecture decisions. 🗂️ Requirements: Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, related field, or equivalent practical experience, 5 years of experience in performance modeling, performance engineering, computer architecture, co-design, or systems engineering, C++ or Python programming experience 📃 Skills: C++, Python, Modeling, Architecture, Codesign, Simulation, Profiling, LLMs, TPU 🏢 Description: Minimum qualifications • Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience. • 5 years of experience in performance modeling/engineering, computer architecture, co-design, or systems engineering. • Experience programming in C++ or Python. Preferred qualifications • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. • Experience with hardware/software co-design problems, especially performance analysis and identification at the pre-silicon stage. • Experience enabling and optimizing large-scale ML models, such as LLMs and large embedding models. • Experience with ML infrastructure, profiling tools, or deep learning inference/serving optimizations. • Familiarity with accelerator architectures. Description Google Cloud’s mission is to make every business successful through AI by combining cutting-edge technology, infrastructure, and talent. AI/ML software engineers in Cloud bridge the gap between pioneering models and a massive product vehicle reaching billions. Our talent density and AI-powered tools drive rapid development, rooted in a culture of empowerment and a bias to action. The TPU Chip Architecture and Performance Co-design team is at the forefront of optimizing custom AI silicon for next-generation machine learning models. As a Senior Performance Co-Design Engineer, you will focus on conducting LLM serving studies. You will analyze and optimize the serving performance of emerging models and use cases on custom hardware, and work closely with hardware architects to influence the evolution of custom ML accelerators. The AI and Infrastructure team delivers AI and Infrastructure at scale, efficiency, reliability, and velocity. Customers include Googlers, Google Cloud customers, and billions of Google users worldwide. Teams work across software and hardware, including TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and more. Responsibilities • Conduct comprehensive serving performance studies on current and emerging LLMs, including 1P and 3P models. • Develop and maintain advanced simulation, profiling, and modeling tools to identify bottlenecks, understand key characteristics, and project serving workload performance. • Partner with model researchers and software and hardware teams to co-design architectural improvements tailored to LLM inference latency and throughput. • Drive data-backed decisions that influence the roadmap for future TPU and Cloud Silicon architectures.

🏢 Summary: Customer Engineer role partnering with sales teams to design and demonstrate Google Cloud solutions for customers. The position leads technical discovery, demos, pilots, solution architecture, and delivery planning to win and expand cloud workloads. 🗂️ Requirements: Bachelor’s degree or equivalent practical experience, 6 years of cloud computing experience, 6 years of presentation delivery experience, Experience presenting to technical stakeholders and executive leaders 📃 Skills: Cloud, GoogleCloud, A2A, LangGraph, CrewAI, AutoGen, VertexAI, LLM, TTFT, MCP, Authentication, Quantization 🏢 Description: Minimum qualifications • Bachelor's degree or equivalent practical experience. • 6 years of experience with cloud computing and delivering presentations. • Experience engaging with, and presenting to, technical stakeholders and executive leaders. Preferred qualifications • Experience navigating AI infrastructure consumption models and optimizing high-throughput training/inference clusters. • Experience implementing multi-agent systems using frameworks such as A2A, LangGraph, CrewAI, and AutoGen. • Experience navigating the startup life cycle, from initial prototyping with AI Studio to scaling and achieving product-market fit on Vertex AI. • Experience working with, and a passion for, the high-growth startup ecosystem and its typical rapid-scaling issues. • Knowledge of LLM-native performance metrics, including TTFT, tokens/sec, and cost-per-request, and techniques for optimizing state management, quantization, and provisioned throughput. • Ability to implement secure agentic workflows incorporating MCP, tool-calling, and enterprise-grade authentication. About the job As a Customer Engineer, you will partner with technical sales teams to differentiate cloud solutions for customers. You will serve as the customer’s primary technical partner and trusted advisor, leading technical conversations to understand business issues. You will troubleshoot technical questions and roadblocks, participate in proofs of concept and demos, and architect cross-pillar cloud solutions. You will drive the technical win, define delivery and consumption plans, and present practical solutions to technical and business leaders. You will identify, pursue, and win new business workloads while expanding existing ones. The role requires broad technical expertise across infrastructure modernization, application modernization, data analytics, and related areas, combined with sales expertise, market knowledge, and direct technical engagement. Responsibilities • Develop and own the technical account plan and strategy, participating in planning and supporting targeted sales motions. • Combine sales, programming, and solutions architecture expertise to prove the value of the cloud portfolio through complex demos, pilots, and in-depth workshops. • Architect cross-pillar solutions, drive technical wins, and define initial delivery plans for customers; continue to lead technical engagement during the solution phase. • Facilitate the post-sales transition by supporting pricing activities and transitioning the final delivery plan to implementation teams. • Maintain awareness of progress against the delivery plan, providing support to cross-functional teams during ramp, delivery, migration, or implementation phases.