Mempath Architect

🏢 Summary: Executive leadership role directing the multi-year architecture roadmap and commercialization of future Tensor SoCs and chipsets for battery-powered devices. The position leads a global architecture organization, drives hardware-software innovation for performance, power, and cost, and shapes flagship-device experiences including imaging and on-device GenAI. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Science, related field, or equivalent practical experience, 20 years of SoC system architecture and hardware/software co-design experience for battery-powered devices, Track record of driving SoC architecture changes that improve power, performance, or cost, 15 years of people-management experience, Experience leading multiple functional groups or a silicon design/architecture organization, Experience commercializing SoC architecture changes and related software 📃 Skills: SoC, Silicon, Codesign, Architecture, Chipsets, Hardware, Software, Tensor, Power, Performance 🏢 Description: Minimum qualifications • Bachelor's degree in Electrical Engineering, Computer Science, or a related field, or equivalent practical experience. • 20 years of experience in SoC system architecture and hardware/software co-design for battery-powered devices, driving SoC architecture changes for battery-powered devices to achieve improvement in power, performance, or cost. • 15 years of experience in people management, including experience leading multiple functional groups or a silicon design/architecture organization. • Experience with the commercialization of architecture changes (i.e., SoC and related software), not just evaluation and recommendations. Preferred qualifications • Master's degree or PhD in Electrical Engineering, Computer Science, or a related field. • 20 years of experience with silicon system architecture or custom silicon design on process nodes in foundries. • Experience analyzing high-stakes workloads (e.g., GenAI, imaging, computer vision) and defining hardware-software boundaries (e.g., firmware, OS drivers, kernel virtualization). • Excellent change-management and operational leadership skills, with experience driving systemic organizational change or merging large engineering teams across global sites. • Technical knowledge of high-performance coherent fabrics, memory subsystems, and core IPs, including CPU, GPU, TPU, camera, and system security blocks. Description As Senior Director of the Chipset and System-on-a-Chip (SoC) Architecture Team, you will be responsible for exploring, owning, and executing the architecture for future Tensor SoCs and chipsets. You will lead a consolidated organization of full-time employees whose primary mandate is to explore, analyze, and make recommendations on architecture options and innovations for future SoCs and chipsets, including memory architecture and chipsets; identify and drive new system-level features across a cross-functional organization for performance and power optimization of critical user journeys; and ensure all architectural innovations are driven to commercialization. In this role, you will hold decision-making autonomy over SoC and chipset architecture exploration, analysis, recommendations, and commercialization. The role requires the ability to make high-level trade-offs that drive system-level hardware and software innovation. You will directly impact the competitiveness of flagship devices by anticipating technology trends and preparing Tensor architecture for future critical user journeys, particularly imaging, GenAI, and Gemini use cases. You will ensure future silicon generations are optimized for performance, power, and cost, especially for first-party use cases, while preventing costly silicon-area inflation and unproductized hardware blocks. You will direct a geographically distributed, vertically integrated organization across Mountain View, Bangalore, and Taiwan. Responsibilities • Lead the multi-year silicon system architecture roadmap for future Tensor SoCs. • Establish and enforce a directed innovation model in which all hardware and IP innovations have explicit software sponsorship. • Lead and scale a multi-disciplinary, geographically distributed organization of full-time employees across three core pillars. • Provide mentorship, professional development, and strategic management to a team of senior leaders. • Integrate merged organizations and establish clear operational boundaries with implementation and IP core teams. • Collaborate closely to set strict system target boundaries, including chassis, power, limits, and performance, without displacing execution-level block architects. • Serve as the lead technical and strategic liaison to executive leadership.

🏢 Summary: Senior Performance Co-Design Engineer role focused on analyzing and optimizing LLM serving performance on custom ML accelerators. The position develops simulation, profiling, and modeling tools, partners across hardware and software teams, and informs future TPU and cloud silicon architecture decisions. 🗂️ Requirements: Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, related field, or equivalent practical experience, 5 years of experience in performance modeling, performance engineering, computer architecture, co-design, or systems engineering, C++ or Python programming experience 📃 Skills: C++, Python, Modeling, Architecture, Codesign, Simulation, Profiling, LLMs, TPU 🏢 Description: Minimum qualifications • Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience. • 5 years of experience in performance modeling/engineering, computer architecture, co-design, or systems engineering. • Experience programming in C++ or Python. Preferred qualifications • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. • Experience with hardware/software co-design problems, especially performance analysis and identification at the pre-silicon stage. • Experience enabling and optimizing large-scale ML models, such as LLMs and large embedding models. • Experience with ML infrastructure, profiling tools, or deep learning inference/serving optimizations. • Familiarity with accelerator architectures. Description Google Cloud’s mission is to make every business successful through AI by combining cutting-edge technology, infrastructure, and talent. AI/ML software engineers in Cloud bridge the gap between pioneering models and a massive product vehicle reaching billions. Our talent density and AI-powered tools drive rapid development, rooted in a culture of empowerment and a bias to action. The TPU Chip Architecture and Performance Co-design team is at the forefront of optimizing custom AI silicon for next-generation machine learning models. As a Senior Performance Co-Design Engineer, you will focus on conducting LLM serving studies. You will analyze and optimize the serving performance of emerging models and use cases on custom hardware, and work closely with hardware architects to influence the evolution of custom ML accelerators. The AI and Infrastructure team delivers AI and Infrastructure at scale, efficiency, reliability, and velocity. Customers include Googlers, Google Cloud customers, and billions of Google users worldwide. Teams work across software and hardware, including TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and more. Responsibilities • Conduct comprehensive serving performance studies on current and emerging LLMs, including 1P and 3P models. • Develop and maintain advanced simulation, profiling, and modeling tools to identify bottlenecks, understand key characteristics, and project serving workload performance. • Partner with model researchers and software and hardware teams to co-design architectural improvements tailored to LLM inference latency and throughput. • Drive data-backed decisions that influence the roadmap for future TPU and Cloud Silicon architectures.

🏢 Summary: Staff CAD Engineer role focused on architecting, developing, and deploying the CI2 silicon design environment for next-generation TPU and AI/ML hardware. The position improves silicon development flows, iteration speed, and power, performance, cost, and quality outcomes through advanced tooling and cross-functional collaboration. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, related field, or equivalent practical experience, 10 years of technical leadership experience in critical silicon-design areas, Experience in at least two silicon disciplines, Experience developing and deploying advanced tools and development flows for the silicon lifecycle, Ability to lead design-environment architecture, development, and deployment, Knowledge of silicon development phases and scalable design flows 📃 Skills: Silicon, TPU, CI2, AI/ML, DFT, Synthesis, Verification, Firmware, Architecture, Modeling, Place-and-route, Timing, APIs 🏢 Description: Minimum qualifications • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. • 10 years of experience in technical leadership focusing on one or more critical aspects of silicon design. • Experience in two or more silicon disciplines, including architecture modeling, logic design, functional verification, DFT, synthesis, place and route, timing analysis, physical verification, or firmware development. • Experience developing and deploying advanced tools and development flows that streamline the silicon lifecycle and improve engineering productivity. Preferred qualifications • Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. • 15 years of relevant academic and industrial experience in advanced silicon development. • Experience identifying the need for a silicon methodology change, developing a solution, and successfully deploying it with impact to more than 25 developers. • Experience developing solutions that require bridging knowledge gaps among collaborators. • Experience collaborating in internal or external ecosystem standardization efforts. • Knowledge of both front-end silicon development processes—architecture, logic design, and verification—and back-end processes—logic synthesis, place and route, timing convergence, and physical verification. About the job Shape the future of AI/ML hardware acceleration by driving TPU technology for demanding AI/ML applications. Develop custom silicon solutions and use design and verification expertise to verify complex digital designs, with a focus on TPU architecture and its integration within AI/ML-driven systems. As a Staff CAD Engineer, Silicon Design Environment, collaborate with domain experts across the silicon development spectrum to deliver the development environment for chips powering next-generation cloud systems. Refine ambiguous intent into solutions and rally others to develop or deploy them. Responsibilities • Use knowledge of silicon development phases to define the architecture and lead the development and deployment of the overall CI2 design environment as a coherent system of first-party and third-party tools, industry-standard and internal APIs/data formats, and scalable design flows. • Collaborate with technical leaders across CI2 sites to identify evolutionary and revolutionary tooling and methodology changes that enable convergence on a shared design environment. • Engage with other internal teams to keep CI2 at the forefront of advanced silicon development. • Ensure developed technologies optimize project iteration speed while achieving planned power, performance, cost, and quality metrics. • Partner with tools and methodologies team members to apply procedural and AI-first approaches that improve efficiency.

🏢 Summary: Lead manufacturing test engineering for hardware systems, managing a team and developing scalable test strategies, automation, and process improvements. The role addresses complex product failures through RCCA, data collection, and manufacturing-process qualification for server, storage, and networking hardware. 🗂️ Requirements: Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent engineering experience, 10 years of test engineering experience in electronics manufacturing, 8 years of people management experience, Python, Bash, and Shell scripting experience for product-specific test plans and test execution 📃 Skills: Python, Bash, Shell, RCCA, ICT, BSCAN 🏢 Description: Minimum qualifications • Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent engineering experience. • 10 years of experience in Test Engineering in electronics manufacturing. • 8 years of experience in people management. • Experience coding in Python, Bash, and Shell scripting to generate product-specific test plans and execute testing accordingly. Preferred qualifications • Experience in manufacturing, quality, or product engineering for hardware technology and systems. • Experience working with server, storage, and networking products, especially AI and ML servers, racks, and integration. • Experience with test station bring-up, gauge R&R/correlation, and partner or agreement manufacturing (ODM, OEM, JDM). • Experience managing manufacturing test hardware using custom electronics, fixturing, instrumentation, and defining test strategy, test automation, test optimization, and scaling test capacity. • Experience with design for test and structural tests such as ICT/BSCAN, Board- and System-level Functional Tests. • Ability to drive improvement of test systems and processes for scaling test capacity. About the job Join a team developing custom silicon solutions that support direct-to-consumer hardware products. Contribute to next-generation hardware experiences focused on performance, efficiency, and integration, while supporting the technical infrastructure behind data centers, platforms, and networks. Responsibilities • Lead a team; set and communicate individual and team priorities that support organizational goals. • Meet regularly with individuals to discuss performance and development, and provide feedback and coaching. • Apply Root Cause Corrective Action (RCCA) fundamentals and collaborate with teams to analyze failures and resolve issues. • Define and execute data-collection activities for highly complex technical issues. • Drive process design, optimization, and qualification activities for manufacturing processes involving components, parts, or products.

🏢 Summary: Product Design Architect role focused on translating industrial design concepts into production-ready, Class-A CAD surfaces for consumer electronics. The position uses NX and Alias to support products from concept through mass production, collaborating with design, engineering, UX, manufacturing, and external teams. 🗂️ Requirements: Bachelor’s degree in a relevant field or equivalent practical experience, 6 years of consumer product design experience, Consumer electronics industry experience, 3D surfacing experience with NX and Alias, Experience designing and shipping consumer products, Portfolio, website, or accessible work samples included with resume 📃 Skills: NX, Alias, CAD, Surfacing, Manufacturing, Prototyping 🏢 Description: Minimum qualifications • Bachelor's degree in a relevant field (e.g. Mechanical Engineering, Product Design, Industrial Design, Manufacturing) or equivalent practical experience. • 6 years of experience in consumer product design, including in the consumer electronics industry. • Experience with 3D surfacing, utilizing NX/Alias. • Experience designing and shipping consumer products. • Include a portfolio, website, or any other relevant link to your work in your resume (providing a viewable link or access instructions). Preferred qualifications • Experience in aligning design team efforts with company goals. • Experience with materials, manufacturing, and all phases of the design process; ability to apply this expertise to provide innovative solutions to complex problems. • Experience leading projects from concept to mass production as a team player with a willingness to learn. • Proven record of shipping exceptional consumer products. • Ability to grow in ambiguity, focus on customer experience, be detail-oriented, and do what it takes to get the job done. • Strong problem-solving, communication, and presentation skills. About the job The Product Design Architect team is part of the Hardware Design organization. Its mission is to support the industrial design team by developing ideas into products and designing consumer devices that delight and inspire users worldwide. The team uses a deeply considered approach to craft beautiful, production-ready Class-A surfaces with a high bar for quality, aesthetics, and mathematical precision. In addition to delivering user-visible surfaces, the team partners cross-functionally to investigate mechanical and component architectures and develop innovative design concepts for appearance models, visualizations, and functional prototypes. As a Product Design Architect, you will use 3D CAD software to capture and maintain industrial design vision from concept to production. You will understand a broad range of manufacturing processes and use cross-functional collaboration to meet engineering, UX, reliability, and cost requirements. You will push 3D CAD to the highest level, focus on details, and bring designs into mass production. The Platforms and Devices team spans computing software platforms and first-party devices and services, researching, designing, and developing technologies that make interaction with computing faster and more seamless. Responsibilities • Leverage NX/Alias to capture and maintain industrial design vision from sketches, reference CAD, and discussions. • Collaborate with Industrial Design, UX, Engineering, Manufacturing, and external teams to deliver production-level CAD models with Class-A surfaces in NX/Alias that meet requirements. • Create high-quality 3D surfaces for design concepts, prototypes, engineering evaluations, and visualizations. • Work independently and cross-functionally throughout the development and build process. • Travel may be needed, including to overseas manufacturing facilities, to ensure manufacturing viability while maintaining the design vision. • Present knowledge of new materials and processes, state-of-the-art innovation, and emerging technologies that inform product development. • Identify future tools and processes to enhance capabilities and support department and company growth.

🏢 Summary: Customer Engineer role partnering with sales teams to design and demonstrate Google Cloud solutions for customers. The position leads technical discovery, demos, pilots, solution architecture, and delivery planning to win and expand cloud workloads. 🗂️ Requirements: Bachelor’s degree or equivalent practical experience, 6 years of cloud computing experience, 6 years of presentation delivery experience, Experience presenting to technical stakeholders and executive leaders 📃 Skills: Cloud, GoogleCloud, A2A, LangGraph, CrewAI, AutoGen, VertexAI, LLM, TTFT, MCP, Authentication, Quantization 🏢 Description: Minimum qualifications • Bachelor's degree or equivalent practical experience. • 6 years of experience with cloud computing and delivering presentations. • Experience engaging with, and presenting to, technical stakeholders and executive leaders. Preferred qualifications • Experience navigating AI infrastructure consumption models and optimizing high-throughput training/inference clusters. • Experience implementing multi-agent systems using frameworks such as A2A, LangGraph, CrewAI, and AutoGen. • Experience navigating the startup life cycle, from initial prototyping with AI Studio to scaling and achieving product-market fit on Vertex AI. • Experience working with, and a passion for, the high-growth startup ecosystem and its typical rapid-scaling issues. • Knowledge of LLM-native performance metrics, including TTFT, tokens/sec, and cost-per-request, and techniques for optimizing state management, quantization, and provisioned throughput. • Ability to implement secure agentic workflows incorporating MCP, tool-calling, and enterprise-grade authentication. About the job As a Customer Engineer, you will partner with technical sales teams to differentiate cloud solutions for customers. You will serve as the customer’s primary technical partner and trusted advisor, leading technical conversations to understand business issues. You will troubleshoot technical questions and roadblocks, participate in proofs of concept and demos, and architect cross-pillar cloud solutions. You will drive the technical win, define delivery and consumption plans, and present practical solutions to technical and business leaders. You will identify, pursue, and win new business workloads while expanding existing ones. The role requires broad technical expertise across infrastructure modernization, application modernization, data analytics, and related areas, combined with sales expertise, market knowledge, and direct technical engagement. Responsibilities • Develop and own the technical account plan and strategy, participating in planning and supporting targeted sales motions. • Combine sales, programming, and solutions architecture expertise to prove the value of the cloud portfolio through complex demos, pilots, and in-depth workshops. • Architect cross-pillar solutions, drive technical wins, and define initial delivery plans for customers; continue to lead technical engagement during the solution phase. • Facilitate the post-sales transition by supporting pricing activities and transitioning the final delivery plan to implementation teams. • Maintain awareness of progress against the delivery plan, providing support to cross-functional teams during ramp, delivery, migration, or implementation phases.

🏢 Summary: Senior Chip Package SI/PI Engineer role supporting TPU-based AI/ML hardware acceleration. The position drives chip-package-system co-design, simulations, characterization, methodology development, and electrical design closure for advanced 2.5D/3D packages. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, related field, or equivalent practical experience, 10 years of chip/package or system PCB SI/PI design experience, Experience with industry SI/PI modeling toolchains, SI/PI simulation and characterization experience at package and system level, Cross-functional collaboration with chip, board, system, and vendor teams 📃 Skills: HFSS, ADS, Sigrity, Siwave, SIPI, PCB, TPU, ASIC, Python, Matlab, C++, STA, EMIR, DFM 🏢 Description: Minimum qualifications: • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. • 10 years of experience with SI/PI design for chip/package or system PCB. • Experience with industry Signal Integrity and Power Integrity (SI/PI) modeling toolchains, such as HFSS, ADS, Sigrity, and Siwave. Preferred qualifications: • Master’s degree or PhD in Electrical Engineering or SI/PI. • Experience in 2.5D/3D package design, including silicon interposer, silicon bridge, and 3D die stacking technologies, with SI/PI analysis expertise for high-speed interconnects. • Knowledge of next-generation memory and chiplet standards, including timing budgets and design and sign-off methodologies. • Understanding of Static Timing Analysis, on-chip DVD/EMIR, system voltage budgets, and voltage regulator modeling and design. • Ability to lead cross-functionally across chip design, physical design, STA, packaging, system, and validation teams. • Proficiency in Python, Matlab, or C++ for automation flows and advanced data processing and analysis. In this role, you will help shape AI/ML hardware acceleration and drive TPU technology for demanding AI/ML applications. You will develop custom silicon solutions and contribute design and verification expertise for complex digital designs, with a focus on TPU architecture and its integration in AI/ML-driven systems. As a Chip Package Signal Integrity/Power Integrity (SI/PI) Engineer on the chip implementation team, you will be responsible for chip-package design, SI/PI simulation, and characterization at package and system level. You will work with system architects, ASIC engineers, SI/PI engineers, chip and board design teams, system design teams, and vendors to deliver chip packaging signal and power implementations that meet chip, package, and system electrical requirements. • Drive chip-package-system co-design through SI/PI analysis and optimization, contributing to product definition and optimizing chip floorplans, power-tree structures, and netlists for HPC using 2.5D/3D package technology. • Develop power-integrity methodologies for advanced package technology and improve methodology accuracy and productivity. • Evaluate new package technologies and high-speed interface IP. • Collaborate with chip design, system design, and supplier teams to establish chip-package SI/PI targets, define chip-design boundaries, and explore SI/PI and DFM trade-offs for package design closure in production. • Provide feedback on chip floorplans based on package and system routability and SI/PI considerations.

🏢 Summary: Lead Google Cloud AI Research engineering teams developing and deploying large-scale generative AI solutions. The role combines technical strategy, ML infrastructure optimization, system design, code development, and people leadership across multiple teams and locations. 🗂️ Requirements: Bachelor’s degree or equivalent practical experience, 8+ years of software development experience, 5+ years leading ML design and ML infrastructure optimization, 3+ years in technical leadership, 2+ years with state-of-the-art GenAI techniques or related concepts, 2+ years of people management or team leadership experience 📃 Skills: Python, C, C++, Java, JavaScript, ML, GenAI, LLMs, Multimodal, Vision, Deployment, Evaluation, Debugging, Finetuning 🏢 Description: Minimum qualifications • Bachelor’s degree or equivalent practical experience. • 8 years of experience with software development in one or more programming languages (e.g., Python, C, C++, Java, JavaScript). • 5 years of experience leading ML design and optimizing ML infrastructure (e.g., model deployment, model evaluation, data processing, debugging, fine tuning). • 3 years of experience in a technical leadership role. • 2 years of experience with state of the art GenAI techniques (e.g., LLMs, Multi-Modal, Large Vision Models) or with GenAI-related concepts (language modeling, computer vision). • 2 years of experience in a people management or team leadership role. Preferred qualifications • Master’s degree or PhD in Engineering, Computer Science, or a related technical field. • 3 years of experience working in an organization involving cross-functional or cross-business projects. About the job Software Engineering Managers provide technical leadership for major projects while managing teams of engineers. They manage project goals, contribute to product strategy, develop their teams, and help engineers optimize their code. This role manages engineers across multiple teams and locations, a large product budget, and the deployment of large-scale projects across multiple international sites. The Google Cloud AI Research team addresses AI challenges across industries including technology, healthcare, finance, and retail, conducting research with scientific and real-world impact and collaborating with product teams to bring innovations to customers. Responsibilities • Set and communicate team priorities that support broader organizational goals; align strategy, processes, and decision-making across teams. • Set clear expectations based on individuals’ levels and roles; meet regularly to discuss performance and development, and provide feedback and coaching. • Develop the mid-term technical vision and roadmap for one or more teams; evolve the roadmap for future requirements and infrastructure needs. • Design, guide, and vet system designs; write product or system development code to solve ambiguous problems. • Lead the design of GenAI solutions, optimize ML infrastructure, and guide data preparation and model optimization strategies.

🏢 Summary: Lead the architecture and scaling of AI/ML infrastructure for YouTube Ads creative automation. The role focuses on high-throughput distributed systems, GenAI media-processing pipelines, experimentation platforms, and technical leadership across product and research teams. 🗂️ Requirements: Bachelor’s degree in Computer Science, related technical field, or equivalent practical experience, 8 years of software development experience, 5 years of software product testing and launch experience, 5 years building large-scale infrastructure, distributed systems, networks, compute, storage, or hardware architecture, 3 years of software design and architecture experience, Experience designing or deploying machine-learning infrastructure or platforms 📃 Skills: Python, TensorFlow, PyTorch, Cloud, Distributed, Infrastructure, Architecture, Algorithms, MachineLearning, DeepLearning, GenAI 🏢 Description: Minimum qualifications • Bachelor’s degree in Computer Science, a related technical field, or equivalent practical experience. • 8 years of experience in software development. • 5 years of experience testing and launching software products. • 5 years of experience building and developing large-scale infrastructure, distributed systems or networks, or experience with compute technologies, storage, or hardware architecture. • 3 years of experience with software design and architecture. • Experience designing or deploying machine learning (ML) infrastructure or platforms. Preferred qualifications • Master’s degree or PhD in Engineering, Computer Science, or a related technical field. • 8 years of experience with data structures and algorithms. • 3 years of experience in a technical leadership role leading project teams and setting technical direction. • 3 years of experience working in a complex, matrixed organization involving cross-functional or cross-business projects. • Proficiency in deep learning frameworks (e.g., TensorFlow, PyTorch) and cloud/distributed data technologies. About the job Develop next-generation technologies that operate at massive scale. Work on a project critical to business needs, with opportunities to switch teams and projects as priorities evolve. Bring ideas across areas including distributed computing, large-scale system design, networking, data storage, artificial intelligence, and more. Manage project priorities, deadlines, and deliverables. Design, develop, test, deploy, maintain, and enhance software solutions. The YouTube Ads Creative Optimization (YACO) team develops Creative Automation applications that drive advertiser value with minimal advertiser effort by leveraging AI technologies. The team operates at the intersection of Ads, YouTube, and Research. Responsibilities • Serve as the technical leader responsible for architecting, scaling, and steering next-generation infrastructure that powers AI/ML applications. • Operate at the intersection of Ads, YouTube, and GenAI research to build high-throughput systems enabling seamless creative generation and optimization. • Define the technical roadmap and architect scalable foundational infrastructure, including creative data engines, generation and rendering pipelines, and agentic orchestration frameworks. • Design and optimize distributed systems for complex GenAI and heavy media-processing workloads. • Build and mature experiment and learning infrastructure to accelerate model training, evaluation, and rapid deployment. • Partner with Product Management, Research, and executive leadership to align infrastructure capabilities with long-term business goals. • Guide, mentor, and elevate executive and junior engineers, fostering technical excellence and execution.

🏢 Summary: Software engineering role focused on building and operating switch software for Google’s data-center network operating system. The position supports AI networking and high-performance TPU/GPU fabrics, with responsibility for scalable network performance, software delivery, and system issue resolution. 🗂️ Requirements: Bachelor’s degree or equivalent practical experience, 5 years of software development experience, 3 years of software product testing, maintenance, or launch experience, 1 year of software design and architecture experience, 3 years of large-scale infrastructure, distributed systems, networks, compute, storage, or hardware architecture experience, Networking experience with L2, L3, ACL protocol layers, and SDN 📃 Skills: Networking, SDN, Linux, L2, L3, ACL, Multithreading, Infrastructure, DistributedSystems, Switching, TPU, GPU 🏢 Description: Minimum qualifications • Bachelor’s degree or equivalent practical experience. • 5 years of experience with software development in one or more programming languages. • 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture. • 3 years of experience developing large-scale infrastructure, distributed systems or networks, or experience with compute technologies, storage or hardware architecture. • Experience with networking (L2/L3/ACL protocol layers) and SDN. Preferred qualifications • Master's degree or PhD in Computer Science, or a related technical field. • 5 years of experience with data structures and algorithms. • Experience developing accessible technologies. • Knowledge of Linux user space development and multi-threading development. About the job Software engineers develop next-generation technologies that change how billions of users connect, explore, and interact with information. Products operate at massive scale and span areas including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design, and mobile. As a software engineer, you will work on a project critical to business needs, with opportunities to switch teams and projects as the business evolves. The role requires versatility, leadership, and enthusiasm for solving new full-stack problems. Join a high-performing team responsible for the network operating system powering data-center infrastructure. Contribute to projects enabling AI networking and high-performance fabrics for TPU and GPU workloads. The Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power services. Its computational challenges are complex and enabled by custom hardware designed and manufactured in-house. The work spans systems from concept through high-volume manufacturing and can shape the machinery used in cutting-edge data centers. Responsibilities • Design, develop, test, deploy, maintain, and improve switch software. • Manage individual project priorities, deadlines, and deliverables. • Manage scalability and performance tuning of large-scale networks. • Triage product or system issues and debug, track, and resolve them by analyzing their sources and impact on hardware, network, or service operations and quality.