Staff CAD Engineer, Silicon Design Environment, Google Cloud

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in technical leadership focusing on one or more critical aspects of silicon design.
• Experience in two or more silicon disciplines, including architecture modeling, logic design, functional verification, DFT, synthesis, place and route, timing analysis, physical verification, or firmware development.
• Experience developing and deploying advanced tools and development flows that streamline the silicon lifecycle and improve engineering productivity.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
• 15 years of relevant academic and industrial experience in advanced silicon development.
• Experience identifying the need for a silicon methodology change, developing a solution, and successfully deploying it with impact to more than 25 developers.
• Experience developing solutions that require bridging knowledge gaps among collaborators.
• Experience collaborating in internal or external ecosystem standardization efforts.
• Knowledge of both front-end silicon development processes—architecture, logic design, and verification—and back-end processes—logic synthesis, place and route, timing convergence, and physical verification.

About the job

Shape the future of AI/ML hardware acceleration by driving TPU technology for demanding AI/ML applications. Develop custom silicon solutions and use design and verification expertise to verify complex digital designs, with a focus on TPU architecture and its integration within AI/ML-driven systems.

As a Staff CAD Engineer, Silicon Design Environment, collaborate with domain experts across the silicon development spectrum to deliver the development environment for chips powering next-generation cloud systems. Refine ambiguous intent into solutions and rally others to develop or deploy them.

Responsibilities

• Use knowledge of silicon development phases to define the architecture and lead the development and deployment of the overall CI2 design environment as a coherent system of first-party and third-party tools, industry-standard and internal APIs/data formats, and scalable design flows.
• Collaborate with technical leaders across CI2 sites to identify evolutionary and revolutionary tooling and methodology changes that enable convergence on a shared design environment.
• Engage with other internal teams to keep CI2 at the forefront of advanced silicon development.
• Ensure developed technologies optimize project iteration speed while achieving planned power, performance, cost, and quality metrics.
• Partner with tools and methodologies team members to apply procedural and AI-first approaches that improve efficiency.