CAD Automation and Machine Learning Engineer

Apple

Austin, TX • 7m ago • On-site

Mid

On-site

129,300 - 194,700 USD/yr

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Potential salary for CAD Automation and Machine Learning Engineer role

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$129,300 – $194,700/year

Quick Facts

  • Role: CAD Automation and Machine Learning Engineer

  • Focus: Using machine learning and large language models to automate and interact with circuit design and silicon IP workflows

Description

Develop innovative ML and LLM applications to understand, explain, and interact with advanced circuit design software systems, including integration with internal compute infrastructure. Build pipelines that help design engineers efficiently run transistor-level analysis workflows and reuse custom IP assets across multiple ICs. Collaborate with design and CAD teams to support ML/LLM development, troubleshoot software/data issues, and evaluate EDA/open-source vendor solutions.

Responsibilities

  • Develop ML and LLM applications for circuit design automation and interaction with CAD software systems

  • Design and implement integrations with compute infrastructure

  • Identify opportunities to optimize, expedite, and reuse hardware IP delivery

  • Support ML/LLM development processes: understand input data, troubleshoot outputs, resolve software challenges, and deliver solutions to internal customers

  • Collaborate with design teams (Custom Digital, Analog, Mixed-Signal, etc.) to apply techniques that meet their ML/LLM application needs and reduce duplicate design work

  • Validate ML-based applications with CAD experts and evaluate external EDA and open-source packages

Requirements

  • BS in Computer Science or related field

  • Knowledge of basic machine learning techniques

  • Day-to-day experience working with the UNIX shell environment

  • Day-to-day experience with code revision control systems

  • Knowledge of basic electrical engineering topics

Benefits

  • Gain hands-on experience applying machine learning to circuit design automation and custom IP reuse

  • Work across multiple stages of silicon IP development, including ML/LLM technologies and transistor-level analysis and signoff workflows

  • Join a dynamic, collaborative environment with opportunities to solve challenging problems with innovative solutions

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