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October 25, 2026

Senior Architect, Data Processing Systems

Senior

165,000 - 165,000 USD/yr

New York, NY

Quick Facts

  • Role: Define and improve hardware/software architectures for analytics and data intelligence data processing workloads
  • Focus: Performance at scale using an accelerated platform combining CPUs, GPUs, and high-bandwidth networking

Description

You will co-design and evolve data processing platform architectures to improve performance, efficiency, and cost for analytics and data intelligence workloads. You will drive end-to-end performance optimization—from CUDA kernels and accelerated libraries to system-level IO, shuffle, compression, and data movement—while enabling hardware-software co-design through workload analysis. You will also build benchmarking frameworks and analyze production workloads to find optimization opportunities across the full stack.

Responsibilities

  • Co-design future architectures for NVIDIA’s data processing platforms targeting performance, efficiency, and cost
  • Incorporate customer insights from end users, open-source communities, ISVs, storage partners, and CSPs into roadmaps and reference architectures
  • Lead full-stack performance optimization from CUDA kernels and accelerated libraries through system-level IO, shuffle, compression, and data movement
  • Collaborate with CPU, GPU, and platform architects using workload analysis for hardware-software co-design
  • Build and apply constraint-based frameworks and optimization solvers to navigate complex trade-offs across competing metrics
  • Develop benchmarking frameworks to evaluate performance sensitivities and guide hardware-software co-optimization
  • Analyze production workloads to identify compute motifs and IO patterns and drive cross-platform optimization

Requirements

  • MS or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field, or equivalent experience
  • 8+ years of experience in distributed data platforms, databases, systems engineering, performance architecture, accelerated computing, or HW/SW co-design
  • Extensive knowledge in one or more areas: data processing systems, accelerated computing, high-performance IO, CPU/GPU architecture, or large-scale performance analysis
  • Ability to evaluate system-level trade-offs (compute, IO provisioning, memory subsystem development, network topology, storage tiering) across diverse workloads (strong plus)
  • Ability to translate complex system analysis into clear, actionable recommendations for silicon architects, software engineers, and leadership
  • Ability to work across matrixed organizations to align stakeholders and deliver results

Benefits

  • Base salary range: 184,000–287,500 USD (Level 4) or 224,000–356,500 USD (Level 5), depending on location and experience
  • Equity eligibility and benefits

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