Principal AI Silicon Architect

Quick Facts

• Role: Principal AI Silicon Architect

Description

You will own end-to-end power architecture for high-power AI accelerator SoCs, including tradeoff analysis spanning SoC, package, board, and system. The role defines SoC/package-level power management (power/voltage domains, DVFS, clock and power gating, low-power states, and workload-aware power management) and architectures for high-power operating conditions and power/thermal constraints. You will translate workload and product requirements into power budgets and targets, define SoC-to-system control interfaces, and provide technical leadership through the full development lifecycle.

Responsibilities

• Own end-to-end power architecture for high-power AI accelerator SoCs (tradeoffs across SoC, package, board, and system)
• Define power-management architecture (power/voltage domains, DVFS, clock/power gating, low-power states, workload-aware power management)
• Define architectures for high-power operating conditions (workload power excursions, peak/sustained power, transient behavior, power/thermal constraints)
• Partner with performance and workload teams to maximize performance per watt and system efficiency
• Drive architectural tradeoffs across performance, power, power-delivery capability, thermal limits, reliability, area, cost, and implementation complexity
• Translate workload/product requirements into system and silicon-level power budgets, design targets, and architectural requirements
• Define SoC-to-system interfaces and control mechanisms for power, thermal, and platform management
• Collaborate with silicon architecture, physical design, package, board/system, power delivery, thermal, firmware, platform, manufacturing, and validation teams from early architecture through deployment
• Provide technical leadership across architecture specification, design reviews, implementation tradeoffs, silicon bring-up, characterization, and optimization

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR
• Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR
• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience
• Ability to meet Microsoft, customer, and/or government security screening requirements (including passing the Microsoft Cloud Background Check and providing proof of citizenship/residency eligibility for export-controlled information access)

Benefits

• Base pay range (U.S.): USD $165,600–$296,400 per year; different ranges apply for San Francisco Bay area and NYC metro: USD $220,800–$331,200 per year
• Eligible for benefits and other compensation depending on role