Hardware Engineer (Space)

Quick Facts

• Lead hardware design of high-speed digital boards for space applications

Description

In this role, you will lead the hardware design of high-speed digital boards for space applications. Responsibilities include defining FPGA architecture, SoC integration, schematic capture, and mixed-signal circuit design including ADC/DAC interfaces, and leading a multidisciplinary engineering team through the full hardware development lifecycle from requirements and concept through design, verification, and flight qualification. The work includes hands-on troubleshooting and debug experience with complex, high-speed digital hardware in a space or flight environment.

Responsibilities / Day-to-day

• Lead schematic capture and board-level design for high-speed digital hardware in space applications
• Define and drive FPGA architecture and SoC integration across the hardware platform
• Design high-speed digital interfaces including DDR4, SERDES, UART, and SPI
• Perform HyperLynx power/signal integrity analysis and implement corrective design changes
• Conduct worst case analysis (WCA) to verify design margins across operating conditions, voltage, and temperature
• Design mixed-signal circuits including ADC and DAC interface architectures
• Lead and coordinate a multidisciplinary engineering team through hardware development milestones and design reviews
• Collaborate with firmware, software, and systems engineers for hardware/firmware co-design and integration
• Support board bring-up, integration, and debug in the laboratory
• Apply flight hardware design practices and work within space-grade component and reliability constraints
• Generate and maintain design documentation including schematics, BOMs, design review packages, and interface control documents
• Own and drive technical issues to resolution
• Work autonomously with little instruction to solve well-defined problems

Requirements

• Bachelor Degree in Electrical Engineering or a related field
• 6+ years of hardware engineering experience with high-speed digital board design
• Hands-on experience with schematic capture tools (e.g., Mentor Xpedition, Cadence)
• Proficiency in high-speed interface design: DDR4, SERDES, UART, and SPI
• Experience with HyperLynx or equivalent signal integrity simulation tools
• Experience performing worst case analysis (WCA) for electronic circuits
• FPGA architecture definition and SoC integration experience
• Mixed-signal design experience including ADC and DAC circuit design
• Experience with space or flight hardware design and qualification processes
• Demonstrated experience leading a multidisciplinary engineering team
• Proven troubleshooting and debug skills for complex high-speed digital hardware
• Good oral and written communications skills
• US citizenship
• Ability to travel up to 10%

Benefits

• Salary range: $132,500.00 - $209,500.00 annually; for specific work locations within San Jose, the San Francisco Bay area and New York City metropolitan area, base pay range is $164,500.00-$246,500.00 annually
• Compensation may vary based on scope and background; additional cash or stock incentives may be provided
• Medical, financial, and/or other benefits available per position offered