Senior Director, Chipset Systems and SoC Architecture

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or a related field, or equivalent practical experience.
• 20 years of experience in SoC system architecture and hardware/software co-design for battery-powered devices, driving SoC architecture changes for battery-powered devices to achieve improvement in power, performance, or cost.
• 15 years of experience in people management, including experience leading multiple functional groups or a silicon design/architecture organization.
• Experience with the commercialization of architecture changes (i.e., SoC and related software), not just evaluation and recommendations.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.
• 20 years of experience with silicon system architecture or custom silicon design on process nodes in foundries.
• Experience analyzing high-stakes workloads (e.g., GenAI, imaging, computer vision) and defining hardware-software boundaries (e.g., firmware, OS drivers, kernel virtualization).
• Excellent change-management and operational leadership skills, with experience driving systemic organizational change or merging large engineering teams across global sites.
• Technical knowledge of high-performance coherent fabrics, memory subsystems, and core IPs, including CPU, GPU, TPU, camera, and system security blocks.

Description

As Senior Director of the Chipset and System-on-a-Chip (SoC) Architecture Team, you will be responsible for exploring, owning, and executing the architecture for future Tensor SoCs and chipsets.

You will lead a consolidated organization of full-time employees whose primary mandate is to explore, analyze, and make recommendations on architecture options and innovations for future SoCs and chipsets, including memory architecture and chipsets; identify and drive new system-level features across a cross-functional organization for performance and power optimization of critical user journeys; and ensure all architectural innovations are driven to commercialization.

In this role, you will hold decision-making autonomy over SoC and chipset architecture exploration, analysis, recommendations, and commercialization. The role requires the ability to make high-level trade-offs that drive system-level hardware and software innovation.

You will directly impact the competitiveness of flagship devices by anticipating technology trends and preparing Tensor architecture for future critical user journeys, particularly imaging, GenAI, and Gemini use cases. You will ensure future silicon generations are optimized for performance, power, and cost, especially for first-party use cases, while preventing costly silicon-area inflation and unproductized hardware blocks.

You will direct a geographically distributed, vertically integrated organization across Mountain View, Bangalore, and Taiwan.

Responsibilities

• Lead the multi-year silicon system architecture roadmap for future Tensor SoCs.
• Establish and enforce a directed innovation model in which all hardware and IP innovations have explicit software sponsorship.
• Lead and scale a multi-disciplinary, geographically distributed organization of full-time employees across three core pillars.
• Provide mentorship, professional development, and strategic management to a team of senior leaders.
• Integrate merged organizations and establish clear operational boundaries with implementation and IP core teams.
• Collaborate closely to set strict system target boundaries, including chassis, power, limits, and performance, without displacing execution-level block architects.
• Serve as the lead technical and strategic liaison to executive leadership.