Principal Front-End Design Engineer

Quick Facts

Principal Front-End Design Engineer

Description

As a Principal Front-End Design Engineer, you will lead methodology, subsystem architecture, and AI-enabled design innovation across IP and SoC development. You will develop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows, improve automation flows, and drive best practices across global teams.

Responsibilities

• Develop and deploy AI-driven solutions for verification, synthesis, constraints, and DFT workflows
• Architect reusable subsystem reference designs for IP
• Debug and optimize front-end design methodologies and automation flows
• Drive adoption of best practices across design and verification teams
• Collaborate with EDA, IP, and customer-facing engineers to solve complex design challenges
• Mentor engineers through technical leadership and knowledge sharing

Requirements

• BS/MS in Electrical Engineering, Computer Engineering, or related field
• 10+ years of ASIC, SoC, or IP design and verification experience
• Expertise in verification, synthesis, timing constraints, DFT, CDC/RDC, or lint methodologies
• Strong experience with Synopsys tools: VCS, VC SpyGlass, Fusion Compiler, Design Compiler, TestMAX
• Proficiency in SystemVerilog, UVM, Tcl, Python, or similar languages
• Demonstrated technical leadership and influence across cross-functional engineering teams

Benefits

• Comprehensive health, wellness, and financial benefits
• Base salary plus potential annual bonus, equity, and other discretionary bonuses
• Total rewards package; additional details provided during the hiring process