Hardware Test Engineer

Quick Facts

Hardware Test Engineer (Irvine, CA)

Description

Hardware Test Engineer role focused on validating and debugging digital and embedded hardware from schematic through board bring-up and production. You will drive testing and performance verification across PCIe, power sequencing, signal integrity, and precision mixed-signal designs—documenting results and performing root-cause analysis.

Responsibilities

• Execute design validation, board bring-up, functional testing, and performance verification
• Perform root cause analysis (RCA) and debug hardware issues across development, validation, and production
• Conduct board bring-up and validation using oscilloscopes, logic analyzers, and protocol analyzers; document test results
• Collaborate with PCB layout, firmware, and system engineering teams in design reviews and feedback loops (DFM/DFT)

Requirements

• 5–7 years of hands-on experience developing digital and embedded hardware from concept/schematics through bring-up testing
• Experience designing and debugging PCIe Gen1, including reference clock distribution, AC coupling, lane routing constraints, and link training/eye or compliance debug
• Experience with low-voltage DC power design: power tree and sequencing, buck converters and LDOs, power-integrity checks, and low-power techniques
• Practical signal integrity knowledge for high-speed interfaces, including impedance-controlled stackups, termination, crosstalk, return-path management, and pre-/post-layout SI review
• Proficiency with Cadence Allegro Design Entry HDL (Concept HDL) for schematic capture, including library/symbol management and clean BOM/netlist handoff to layout
• Experience with SPI, I²C, UART, USB, and GPIO including level shifting, pull-up sizing, bus timing, and protocol-level debugging
• Ability to execute validation/testing with documented results
• Ability to conduct RCA and hardware debugging across development, validation, and production

Benefits

Not specified in the provided posting.