Principal Engineer, SOC Design

🏢 Summary: Principal Engineer role focused on SoC design and integration for advanced memory and storage solutions targeting cloud, data center, and emerging computing applications. The position involves leading microarchitecture, RTL development, third-party IP integration, and full ASIC flow through tape-out. It requires deep expertise in high-performance SoC design, timing, and silicon bring-up. 🗂️ Requirements: Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Science or related field, 15+ years of industry experience in ASIC/SoC design, Hands-on experience with full ASIC design flow from design to tape-out, Experience with SoC-level synthesis, STA, lint, and CDC checks, Experience integrating third-party IPs at SoC level, Experience with commercial IPs such as ARM cores, DDR, Ethernet, UCIe, Experience with ATE vector generation, testing, and silicon bring-up, Knowledge of PPA trade-offs, Experience working with DFT/PI/PD teams, Strong understanding of AMBA bus architecture 📃 Skills: ASIC, SoC, RTL, ARM, AMBA, DDR, UCIe, Ethernet, STA, CDC, Lint, DFT, Synthesis, PPA, ATE 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Principal Engineer, SOC Design What You'll Do The DRAM Development Lab (DDL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash. DDL's vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps. Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You'll focus on enhancement of memory and storage capability by developing prototype and production controllers. Job ID: 42866 Location: Daily onsite presence at our San Jose or Folsom office in alignment with our Flexible Work policy Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level. Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA). Reviews 3rd party IPs including ARM cores, DDR controller, and UCIe PHY Responsible for integrating the third part IPs and sub system at top level Work closely with architects and verification engineers to ensure sound design at SoC level. Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis What You Bring Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of Industry experience preferred. Highly motivated with good verbal and written communication skills. Hands on knowledge & experience in ASIC design flow from design to tape out. Experience & Good knowledge in ATE vector generation, testing and silicon bring up. Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces. Good understanding of PPA (performance, power, and area) trade-offs. Experience in SoC level synthesis, timing analysis, lint check, CDC checks. Experience in interfacing 3rd party service companies for DFT/PI/PD. Good knowledge and experience in AMBA bus fabric, ARM cores. Self-motivated problem-solver with an ability to work well in a team. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior SoC Architect role focused on designing and validating next-generation memory and storage solutions, with hands-on RTL development and full lifecycle involvement from architecture to silicon bring-up. The position centers on SSD and DRAM subsystem architecture, SoC integration, and performance optimization for cloud and data center applications. 🗂️ Requirements: Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Science or related field, 10+ years of industry experience in hardware development, Strong experience in SSD architecture and storage technologies, Knowledge of DRAM architecture and memory subsystem design, Experience with RTL design and SoC integration, Experience with data integrity and protection mechanisms (ECC, parity, CRC, RAID), Experience delivering hardware products from architecture through silicon bring-up, Ability to support verification, validation, and debugging activities 📃 Skills: SystemVerilog, Verilog, RTL, SoC, SSD, DRAM, NAND, ECC, CRC, RAID, RTL, Simulation, Emulation, Formal, Silicon 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do The DRAM Development Lab (DDL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash. DDL's vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SoC Architecture team is involved in SoC‑level designs for emerging memory/storage solutions and validates each design's feasibility with hands‑on RTL implementation. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps. This role offers the opportunity to shape next-generation SoC and subsystem architectures while staying deeply hands-on in RTL design, integration, and validation. It is ideal for engineers who want to turn advanced memory and storage concepts into real hardware and drive them all the way to silicon Job ID: 42896 Location: Daily onsite presence at our Folsom office in alignment with our Flexible Work policy Collaborate with architecture, design, verification, and system teams to define and implement SoC features and subsystems Translate architectural requirements into microarchitecture, RTL design, and verification plans Design and develop RTL for SoC blocks and integration logic using SystemVerilog/Verilog Drive block- and SoC-level integration activities, including clocking, reset, power intent, interfaces, and configuration infrastructure Analyze performance, power, area, and timing tradeoffs to deliver efficient and scalable designs Support design verification by debugging issues found in simulation, emulation, formal analysis, and silicon validation Participate in pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis and issue resolution Contribute to technical documentation, block specification, test plans, and design reviews What You Bring Bachelors in Electrical, Computer Science or related with 15+ years of experience or Masters in Electrical, Computer Science or related Science with 13+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 10+ years of Industry experience preferred. Strong technical background in SSD architecture and storage technologies, including controller architecture, NAND/flash behavior, data path design, and system performance consideration. Familiarity with DRAM architecture and memory subsystem design, including memory hierarchy, bandwidth/latency tradeoffs, buffering, and traffic behaviors. Experience with data integrity and protection mechanisms, such as ECC, parity, CRC, RAID, and end-to-end data protection schemes. Experience contributing to complex hardware products from architecture definition through RTL implementation, verification, and silicon bring-up. Proven ability to collaborate effectively across architecture, design, verification, firmware, and validation teams. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$168,000—$268,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior Analog/Mixed-Signal IC Design Engineer responsible for developing high-speed memory I/O circuits for advanced DRAM and NAND interfaces. The role involves hands-on design, simulation, layout supervision, and silicon bring-up for high-speed data converters, PLLs, and SERDES in advanced CMOS nodes. You will own circuit specifications and optimize performance, power, and area for next-generation memory interfaces. 🗂️ Requirements: BS/MS/PhD in Electrical Engineering or Computer Science, 5+ years in SoC architecture and high-speed serial interface design, Experience with analog and mixed-signal circuit design in advanced CMOS nodes, Experience designing high-speed interfaces (DDR, LPDDR, GDDR, or HBM), Expertise in high-speed I/O layout requirements, Knowledge of DLL, PLL, FFE, CTLE, DFE, DCC, ODT, output drivers, Experience with high-frequency clock distribution design, Proficiency with EDA tools for simulation and verification, Experience with silicon bring-up and automated measurement, Strong scripting skills in Tcl or Perl 📃 Skills: CMOS, SoC, DDR, LPDDR, GDDR, HBM, SERDES, PLL, DLL, FFE, CTLE, DFE, DCC, ODT, Cadence, MATLAB, Simulink, Tcl, Perl, Python, EDA 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Memory IO Lab is part of Samsung's Memory Business Unit, the industry's all-time DRAM and NAND Flash leader both in technology as well as in volume. Memory IO's vision is to provide memory interface technology solutions which can be adopted in DDR, LPDDR, GDDR, and more. We are an integral part of Samsung's paramount R&D innovation engine. We work closely with cross-disciplinary development teams to bring feature innovation to product roadmaps. Come and join the team that is providing the next generation IO tech solutions to support emerging machine learning applications, data analytics, and edge computing. Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy What You'll Do Hands on in analog circuit design, which includes circuit design, running simulations to confirm functionality and performance, and work with verification team to verify design. The mixed-signal designs will include but are not limited to the following: high-speed data converters, PLL, and SERDES. Guide layout floor-planning block and top level to optimize the overall performance; supervise the layout activities and give concise guidelines to layout engineers, need to be hands on in drawing layout if necessary. Ownership of circuit and system specifications. Simulate designs with state-of-the-art CAD tools. Document designs and simulation results. What You Bring BS 10+ years experience, MS 8+years of experience, PhD 5+ years experience in Electrical Engineering, Computer Science preferred. 5+ years of experience working with system on chip architecture, high-speed serial interfaces, analog and mixed-signal circuit designs using advanced CMOS technology nodes. Prior experience in design of any one of the standard high speed interfaces like DDR, LPDDR, , GDDR, HBM I/O interface. Needs to be an expert in providing and understanding layout requirements of high speed circuits. Knowledge of all facets of high speed I/O design but specifically should include DLL / PLL / FFE / CTLE / DFE, output drivers , ODT, Duty cycle correction (DCC), Training/calibration to improve timing, high speed power design and low power design. Experience working closely with device/process team to define transistor specs The ideal individual must have proven ability to achieve results in a fast moving, dynamic environment. Ability to troubleshoot and analyze complex problems. Excellent communication (written and verbal) and interpersonal skills Experience in high frequency clock distribution design, implementation, and analysis. Deep understanding of PPA (performance, power, and area) trade-offs. Ability to handle EDA tools well, such as Cadence, MATLAB (Simulink), and EM tools Experience on silicon bring-up and automatic measurement using script Strong scripting and automation skills using Tcl/Perl. Knowledge of Python is a plus. Self-motivated problem-solver with an ability to work well in a team. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Staff Engineer role focused on end-to-end SRAM circuit design for advanced semiconductor technologies, including development of high-performance, low-power memory arrays for AI, mobile, and computing platforms. The position involves circuit design, simulation, physical verification, methodology automation, silicon bring-up support, and mentoring engineers. Candidates are expected to have deep expertise in SRAM architecture, advanced process nodes, and semiconductor device physics. 🗂️ Requirements: Bachelor's degree in Electrical Engineering with 10+ years of experience or Master's degree with 8+ years of experience, Experience in SRAM or memory circuit design, Proven delivery of SRAM designs in advanced process nodes, Knowledge of semiconductor device physics, Expertise in SRAM architecture and control circuits, Experience with timing analysis and power analysis, Proficiency with circuit simulation and design tools, Knowledge of scripting for automation, Experience with advanced technology nodes such as 5nm or 3nm, Experience with low-power SRAM design techniques, Background in silicon debug and root-cause analysis 📃 Skills: SRAM, HSPICE, Finesim, Spectre, Cadence, Virtuoso, Python, Perl, TCL, FinFET, GAA, SOI, DRC, LVS, DFM 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do We are looking for a passionate and experienced Staff Engineer, SRAM Circuit Design to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms. This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design. - Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm). - Optimize SRAM designs for performance, power and area (PPA) and yield. - Develop custom layouts and perform physical design verifications (e.g., DRC, LVS). - Evaluate trade-offs between speed, power, and area to meet design targets. - Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification. - Work with product and test engineers to develop test plans and support silicon bring-up. - Mentor junior engineers, providing guidance on SRAM design techniques and best practices. - Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance. - Contribute to patents, technical papers, or industry conferences to advance SRAM technology. What You Bring - Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree in electrical engineering with 8+ years of experience strongly preferred. - Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes. - Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.). - Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths. - Familiarity with timing analysis, power analysis, and design for manufacturability (DFM). - Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc. - Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks. - Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams. - Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond). - Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling). - Background in silicon debug and root-cause analysis. What We Offer - Competitive base pay range: $163,000—$253,000 USD. - Incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off, holidays, and sick leave. - Family support benefits including fertility care, adoption support, medical travel support, and virtual vet care. - Emotional wellness support with on-demand apps and therapy sessions. - Onsite café, gym, and virtual fitness classes. - Flexible work environment. Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used to support recruitment efficiency, but all hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Senior mixed-signal/analog design role focused on high-speed memory I/O interfaces and advanced CMOS technologies. The position involves analog circuit design, simulations, layout guidance, verification, and silicon bring-up for technologies such as DDR, LPDDR, GDDR, and HBM. Candidates will work on PLL, SERDES, and high-speed data converter solutions supporting next-generation machine learning and data-centric applications. 🗂️ Requirements: BS/MS/PhD in Electrical Engineering or Computer Science, 5+ years in SoC architecture and analog mixed-signal circuit design, Experience with high-speed serial interfaces, Experience with DDR, LPDDR, GDDR, or HBM I/O interfaces, Expertise in high-speed circuit layout requirements, Knowledge of DLL, PLL, FFE, CTLE, DFE, ODT, DCC, and training/calibration, Experience with advanced CMOS technology nodes, Experience with high-frequency clock distribution design, Understanding of PPA trade-offs, Proficiency with EDA tools, Experience with silicon bring-up and automated measurements, Strong Tcl/Perl scripting skills, Ability to work onsite in San Jose 📃 Skills: DDR, LPDDR, GDDR, HBM, SERDES, PLL, DLL, FFE, CTLE, DFE, ODT, DCC, CMOS, Cadence, MATLAB, Simulink, Python, Tcl, Perl, EDA 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Memory IO Lab is part of the Memory Business Unit focused on memory interface technology solutions for DDR, LPDDR, GDDR, and related technologies. The team works closely with cross-disciplinary development teams to bring feature innovation to product roadmaps supporting machine learning applications, data analytics, and edge computing. Location: Daily onsite presence at the San Jose headquarters in alignment with the Flexible Work policy. What You'll Do - Hands-on analog circuit design including circuit implementation, simulations, and verification collaboration. - Work on mixed-signal designs including high-speed data converters, PLL, and SERDES. - Guide layout floor-planning at block and top level to optimize performance. - Supervise layout activities and provide guidelines to layout engineers. - Participate directly in layout drawing when necessary. - Own circuit and system specifications. - Simulate designs using advanced CAD tools. - Document designs and simulation results. What You Bring - BS with 10+ years, MS with 8+ years, or PhD with 5+ years of experience in Electrical Engineering or Computer Science. - 5+ years of experience with system-on-chip architecture, high-speed serial interfaces, and analog mixed-signal circuit design using advanced CMOS technology nodes. - Prior experience designing standard high-speed interfaces such as DDR, LPDDR, GDDR, or HBM I/O interfaces. - Expertise in layout requirements for high-speed circuits. - Knowledge of DLL, PLL, FFE, CTLE, DFE, output drivers, ODT, DCC, training/calibration, high-speed power design, and low-power design. - Experience working with device/process teams to define transistor specifications. - Ability to troubleshoot and analyze complex problems. - Experience in high-frequency clock distribution design, implementation, and analysis. - Deep understanding of performance, power, and area trade-offs. - Ability to use EDA tools such as Cadence, MATLAB/Simulink, and EM tools. - Experience with silicon bring-up and automated measurement scripting. - Strong scripting and automation skills using Tcl/Perl; Python knowledge is a plus. - Strong communication and interpersonal skills. - Ability to work in a fast-moving, dynamic environment. What We Offer - Competitive base pay range of $163,000—$253,000 USD. - Incentive opportunities based on individual and company performance. - Medical, dental, vision, and 401(k) benefits. - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Family support benefits including fertility care, adoption support, and medical travel support. - Emotional wellness resources including confidential therapy sessions. - Onsite café, gym, and virtual wellness classes. - Flexible work environment and wellbeing-focused benefits. Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates requiring support. Our Commitment to Innovation and Fairness AI tools may be used during recruitment as support tools only. Hiring decisions are made by recruiting teams and hiring managers. Applicant AI Use Policy Candidates are expected to rely on their own knowledge and skills during the application and interview process. AI tools may only be used for preparation, grammar, and research. Trade Secret Notice Applicants agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Lead end-to-end design of next-generation SRAM memory circuits for advanced semiconductor nodes, driving high-performance, low-power solutions for computing, mobile, and AI platforms. The role focuses on SRAM architecture, circuit simulation, physical verification, and PPA optimization while mentoring engineers and contributing to technology innovation. This position combines deep technical expertise with strategic leadership in advanced memory design. 🗂️ Requirements: Bachelor’s or Master’s degree in Electrical Engineering, 18+ years of industry experience in SRAM or memory circuit design, Proven experience delivering SRAM designs in advanced process nodes (5nm, 3nm, or beyond), Strong knowledge of semiconductor device physics and process technologies (FinFET, GAA, SOI), Expertise in SRAM architecture including bitcells, sense amplifiers, write drivers, and control paths, Proficiency in circuit simulation and variation analysis using industry-standard tools, Experience with physical design verification (DRC, LVS), Knowledge of timing analysis, power analysis, and design for manufacturability (DFM), Experience with scripting languages for design automation, Background in silicon debug and root-cause analysis 📃 Skills: SRAM, HSPICE, Finesim, Spectre, Cadence, Virtuoso, DRC, LVS, DFM, FinFET, GAA, SOI, Python, Perl, TCL 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do We are looking for a passionate and experienced Principal Engineer, SRAM Circuit Design to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms. This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design. Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm). Optimize SRAM designs for performance, power and area (PPA) and yield. Develop custom layouts and perform physical design verifications (e.g., DRC, LVS). Evaluate trade-offs between speed, power, and area to meet design targets. Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification. Work with product and test engineers to develop test plans and support silicon bring-up. Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance. Contribute to patents, technical papers, or industry conferences to advance SRAM technology. What You Bring Bachelor's degree in electrical engineering with 20+ years of industry experience or master's degree in electrical engineering with 18+ years of experience strongly preferred. Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes. Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.). Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths. Familiarity with timing analysis, power analysis, and design for manufacturability (DFM). Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc. Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks. Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams. Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond). Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling). Background in silicon debug and root-cause analysis. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Our Commitment to Innovation and Fairness At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Trade Secret Notice By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Staff Engineer role focused on end-to-end design of high-performance, low-power SRAM circuits for advanced semiconductor nodes (2nm–5nm). The position involves driving PPA optimization, circuit simulation, physical verification, and methodology development for next-generation computing and AI platforms. It combines deep SRAM technical expertise with leadership and cross-functional collaboration. 🗂️ Requirements: Bachelor’s in Electrical Engineering + 10+ years experience or Master’s + 8+ years experience, Proven experience in SRAM or memory circuit design at advanced process nodes, Expert knowledge of SRAM architecture including bitcells, sense amplifiers, write drivers, control paths, Strong understanding of semiconductor device physics and advanced process technologies, Experience with timing analysis, power analysis, and DFM, Proficiency in circuit simulation and variation analysis, Experience with physical verification (DRC, LVS), Knowledge of scripting for design automation, Experience with silicon debug and root-cause analysis, Experience with advanced nodes (5nm, 3nm, or below) 📃 Skills: SRAM, HSPICE, Finesim, Spectre, Cadence, Virtuoso, DRC, LVS, Python, Perl, TCL, FinFET, GAA, SOI, DFM, PPA 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do We are looking for a passionate and experienced Staff Engineer, SRAM Circuit Design to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms. This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design. Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm). Optimize SRAM designs for performance, power and area (PPA) and yield. Develop custom layouts and perform physical design verifications (e.g., DRC, LVS). Evaluate trade-offs between speed, power, and area to meet design targets. Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification. Work with product and test engineers to develop test plans and support silicon bring-up. Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance. Contribute to patents, technical papers, or industry conferences to advance SRAM technology. What You Bring Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree in electrical engineering with 8+ years of experience strongly preferred. Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes. Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.). Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths. Familiarity with timing analysis, power analysis, and design for manufacturability (DFM). Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc. Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks. Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams. Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond). Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling). Background in silicon debug and root-cause analysis. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior onsite analog/mixed-signal IC design role focused on high-speed SerDes transceiver architecture and circuit development for next-generation interconnect technologies. The position involves designing, simulating, validating, and optimizing low-power analog and custom digital circuits using advanced CMOS processes and EDA tools. 🗂️ Requirements: Bachelor's degree with 10+ years, Master's degree with 8+ years, or PhD with 5+ years of relevant experience, 2+ years of RF/Analog/SerDes SoC design experience, Experience with analog and mixed-signal circuits, Knowledge of SerDes IP circuits including CTLE, DFE, FFE, clock distribution, PI, and IQ generation, Knowledge of SerDes architecture and high-speed interconnect standards, Experience with EDA tools, Experience with scripting languages such as Python or Matlab, Ability to design, simulate, validate, and optimize analog/custom digital circuits 📃 Skills: CMOS, SerDes, RF, Analog, Mixed-signal, CTLE, DFE, FFE, PLL, ADC, DAC, ESD, Cadence, Spectre, Totem, EMX, Python, Matlab, USB, PCIe, UCIe, Ethernet, LDO 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world's technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. What You'll Do In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver (Serdes). You will work on circuits for Serdes IPs, clock generation as well as traditional analog circuits. You'll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies. Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability. Supervise layout designers to generate LVS/DRC clean layout. Optimize layout to improve the power consumption and performance of circuits. Functionality and performance validation in Silicon. What You Bring - Bachelors with 10+ years, Masters with 8+ years or PhDs with 5+ years of experience. - Minimum 2+ yrs experience RF/Analog/Serdes SoC design experience. - Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters. - Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. - Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe). - Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus. - Well-versed in EDA tools (Cadence, Spectre, Totem, EMX). - Comfortable with scripting languages (Python, Matlab). - You're inclusive, adapting your style to the situation and diverse global norms of our people. - An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to Medical/Dental/Vision/401k, the rewards plan includes: - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Fertility care or adoption stipend, medical travel support, and virtual vet care. - On-demand wellness apps and free confidential therapy sessions. - Onsite café and gym, plus virtual fitness classes. - Flexible work environment and work-life balance support. Base Pay Range: $157,000—$243,000 USD. Equal Opportunity Employment Policy Samsung Semiconductor is dedicated to fostering an inclusive environment where individuals are valued regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Comprehensive accommodations are available throughout the recruiting process for candidates with disabilities, long-term conditions, neurodivergence, or pregnancy-related support. Our Commitment to Innovation and Fairness AI tools may be used in recruitment to support efficiency, but hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Principal Engineer role focused on leading AI system architecture research and driving system-level design decisions for next-generation AI platforms. The position centers on modeling, evaluating, and optimizing compute, memory, and interconnect subsystems to improve performance, scalability, and efficiency of large-scale AI workloads. The role bridges AI workloads, hardware architecture, and quantitative system modeling to shape long-term AI infrastructure strategy. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 15+ years of experience in system architecture for large-scale computing platforms, Hands-on experience with analytical and event-driven system-level performance modeling, Deep understanding of AI hardware architectures including compute, memory hierarchies, and interconnects, Strong knowledge of modern AI workloads such as LLMs and DLRMs, Experience translating workload analysis into architectural design decisions, Proficiency in Python, C++, and PyTorch, Ability to work onsite in San Jose 📃 Skills: Python, C++, PyTorch, AI, LLMs, DLRMs, Modeling, Simulation, Architecture, Hardware, Compute, Memory, Interconnects, Networking, Performance, Scalability, Power 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Job Title: Principal Engineer, AI System Architect (Hardware) The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung's long-term AI platform strategy. Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42852 What You'll Do Technically Lead the architecture team with strong direction, shaping system‑architecture strategy and advancing key innovations Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems. Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. Analyze representative and emerging system-level architectural research (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power. Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities. Communicate architectural insights and recommendations through clear technical presentations and documentation. Occasional domestic and international travel (<10%). What You Bring Ph.D. in Computer Science, Electrical Engineering, or a related field preferred, with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems. Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions. Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams. A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior SoC Architect role responsible for translating customer requirements into a high-performance SoC architecture that meets aggressive power, performance, and area targets. The position leads top-level architecture definition, microarchitecture design, trade-off analysis, and validation for custom ASIC/SoC solutions. It involves cross-functional technical leadership from concept through implementation and verification. 🗂️ Requirements: Bachelor's or Master's degree in Electrical Engineering, Computer Science, or related field, 8+ years experience in SoC Architecture or System Engineering, Experience in custom ASIC/SoC development, Deep knowledge of computer architecture and SoC design, Expertise in on-chip interconnects and high-speed interface protocols, Strong understanding of power management and low-power design, Experience with SoC clock, reset, and power domain architecture, Knowledge of RTL design and full SoC design flow, Experience with performance and power modeling, Proficiency in scripting languages 📃 Skills: SoC, ASIC, CPU, GPU, NPU, AMBA, AXI, CHI, PCIe, UALink, SystemC, C++, Python, Perl, RTL, DFx 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.The SoC Architect will serve as a key technical leader, translating client requirements into an optimal SoC blueprint that achieves aggressive PPA (Power, Performance, Area) targets and driving its successful implementation. This role will be a critical leader who provides the technical blueprint that ultimately realizes our clients' business objectives and should have a deep understanding of the complexities of custom SoC development and the ability to leverage broad system knowledge to create innovative solutions. Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy with an average of 20% travel per month. Reports to: Team leader/Head of Custom SoC Solutions Team What You'll Do Customer Requirement Definition and Architecture Design: Analyze and define the functional, performance, and power requirements based on the client's end product and application (e.g., mobile, edge device, data center or physical AI). Conceive and specify the Top-Level SoC Architecture and Microarchitecture, including CPU/GPU/NPU cores, memory subsystem, Interconnect (Coherent/Non-Coherent Fabric), and high-speed I/O interfaces (e.g., PCIe, UALink or ESUN). Architecture Exploration and Validation: Evaluate various architectural trade-offs and validate architectural decisions using performance and power modeling (C/C++, SystemC). Provide technical guidance on IP selection, integration, and system optimization, and define the Design for Debug/Test/Excellence (DFx) strategy. Technical Collaboration and Leadership: Collaborate closely with cross-functional teams (HW Design, Verification, Physical Design, Software) to ensure architectural specifications are accurately translated into the design and implementation phases. Identify and resolve technical risks throughout the project lifecycle, and lead technical communication with clients and What You Bring Bachelor's Degree in Electrical Engineering, Computer Science, or related discipline and 10+ years of experience, or Master's and 8+ years of experience. 5+ years experience in SoC Architecture or System Engineering (experience in custom ASIC/SoC projects is a plus) Deep understanding of Computer Architecture and SoC Design (including CPU, GPU, Accelerators, Caches, and Memory Systems). Expert knowledge and design experience with on-chip interconnects (e.g., AMBA AXI/CHI) and High-Speed Interface protocols. In-depth knowledge of Power Management and low-power design techniques. Experience with SoC-level Clock, Reset, and Power Domain architecture. Comprehensive understanding of the overall RTL design and SoC design flow (Implementation & Verification). Excellent problem-solving skills to independently identify, analyze, and resolve complex technical issues. Ability to communicate and negotiate effectively with diverse stakeholders, including hardware and software engineering teams, managements, and clients. Proficiency in scripting languages such as Python/Perl You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-VL1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$189,000—$301,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/