May 8, 2026
Senior Staff Engineer, SOC Architect and Hardware Engineering
Senior • On-site
San Jose, CA
Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World's Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.
The SoC Architect will serve as a key technical leader, translating client requirements into an optimal SoC blueprint that achieves aggressive PPA (Power, Performance, Area) targets and driving its successful implementation. This role will be a critical leader who provides the technical blueprint that ultimately realizes our clients' business objectives and should have a deep understanding of the complexities of custom SoC development and the ability to leverage broad system knowledge to create innovative solutions.
Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy with an average of 20% travel per month.
Reports to: Team leader/Head of Custom SoC Solutions Team
What You'll Do
Customer Requirement Definition and Architecture Design:
- Analyze and define the functional, performance, and power requirements based on the client's end product and application (e.g., mobile, edge device, data center or physical AI).
- Conceive and specify the Top-Level SoC Architecture and Microarchitecture, including CPU/GPU/NPU cores, memory subsystem, Interconnect (Coherent/Non-Coherent Fabric), and high-speed I/O interfaces (e.g., PCIe, UALink or ESUN).
Architecture Exploration and Validation:
- Evaluate various architectural trade-offs and validate architectural decisions using performance and power modeling (C/C++, SystemC).
- Provide technical guidance on IP selection, integration, and system optimization, and define the Design for Debug/Test/Excellence (DFx) strategy.
Technical Collaboration and Leadership:
- Collaborate closely with cross-functional teams (HW Design, Verification, Physical Design, Software) to ensure architectural specifications are accurately translated into the design and implementation phases.
- Identify and resolve technical risks throughout the project lifecycle, and lead technical communication with clients and
What You Bring
- Bachelor's Degree in Electrical Engineering, Computer Science, or related discipline and 10+ years of experience, or Master's and 8+ years of experience.
- 5+ years experience in SoC Architecture or System Engineering (experience in custom ASIC/SoC projects is a plus)
- Deep understanding of Computer Architecture and SoC Design (including CPU, GPU, Accelerators, Caches, and Memory Systems).
- Expert knowledge and design experience with on-chip interconnects (e.g., AMBA AXI/CHI) and High-Speed Interface protocols.
- In-depth knowledge of Power Management and low-power design techniques.
- Experience with SoC-level Clock, Reset, and Power Domain architecture.
- Comprehensive understanding of the overall RTL design and SoC design flow (Implementation & Verification).
- Excellent problem-solving skills to independently identify, analyze, and resolve complex technical issues.
- Ability to communicate and negotiate effectively with diverse stakeholders, including hardware and software engineering teams, managements, and clients.
- Proficiency in scripting languages such as Python/Perl
- You're inclusive, adapting your style to the situation and diverse global norms of our people.
- An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
- You're collaborative, building relationships, humbly offering support and openly welcoming approaches.
- Innovative and creative, you proactively explore new ideas and adapt quickly to change.
#LI-VL1
What We Offer
The pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance.
This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.
Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.
Equal Opportunity Employment Policy
Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.
Recruiting Agency Policy
We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy
At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.
Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/
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On-site
San Jose, CA
🏢 Summary: RTL Engineer role focused on developing advanced power macromodels for AI memory component IPs using RTL, SystemC, and C-based simulations. The position involves power feature extraction, model calibration and validation, and collaboration on scalable full-system power simulation. The role requires deep expertise in RTL design, synthesis, and power analysis tools for semiconductor and AI computing applications. 🗂️ Requirements: Bachelor’s degree with 10+ years of experience, Master’s degree with 8+ years, or PhD with 5+ years, Strong RTL design, synthesis, and analysis experience, Experience with Verilog, Experience with SystemVerilog, Experience with SystemC, Understanding of CMOS dynamic and leakage power mechanisms, Hands-on experience with synthesis and power analysis tools, Experience with power modeling frameworks and architectural power analysis, Ability to abstract RTL behavior into analytical and FSM-based models, Familiarity with transaction-level modeling 📃 Skills: Verilog, SystemVerilog, SystemC, CMOS, VCS, VCFormal, DesignCompiler, PrimeTimePX, StarRC, PowerArtist, Verdi, McPAT, CACTI, Wattch, Synopsys, RTL, FSM, LUT, AI, GPU 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. This role offers an opportunity to contribute to advanced AI computing and memory technologies through innovative power modeling and analysis. What You'll Do We are seeking an RTL engineer to develop high-fidelity, advanced IP-level power macromodels for AI computing memory component IPs. The role focuses on translating RTL/SystemC/C behavior into time-indexed, input-dependent power models. Location: Daily onsite presence at our San Jose, CA office in alignment with our Flexible Work policy Reports to: SVP, R&D (Power & Thermal Lab) Responsibilities: - Develop high-fidelity, advanced RTL-, SystemC-, and C-based power macromodels for AI memory component IPs using analytical modeling, LUT, FSM, NN, and hybrid methods - Extract activity-, value-, and state-dependent power features from C/SystemC/RTL simulations - Define power-relevant functional states using transaction/state-based abstraction - Support trace-driven power modeling aligned with C/SystemC workload traces - Perform synthesis-assisted calibration using average and worst-case power anchors when available - Validate macromodel accuracy against RTL/gate-level results and real-silicon data when available - Collaborate with software engineers on feature semantics, timing alignment, and model interfaces - Contribute to scalable IP-wise composition for full-system power simulation What You Bring - Bachelor’s degree with 10+ years of experience, Master’s degree with 8+ years, or PhD with 5+ years - Strong RTL design, synthesis, and analysis experience using Verilog/SystemVerilog/SystemC - Solid understanding of dynamic and leakage power mechanisms in CMOS and interconnects - Hands-on experience with logic synthesis and power analysis tools including VCS, VC Formal, Design Compiler, PrimeTime-PX, StarRC, PowerArtist, and Verdi - Experience with academic and industry power modeling tools including McPAT, CACTI, Wattch, and Synopsys Platform Architect - Familiarity with SystemC or transaction-level modeling - Ability to abstract RTL behavior into analytical, table-based, FSM-based, and AI/ML models - Knowledge of power macromodeling, power estimation flows, and architectural power analysis Preferred Qualifications - Experience with GPU, computer architecture, AI memory, memory controllers, PHYs, or high-speed I/O - Knowledge of cross-coupling capacitance, clock power modeling, and signal integrity - Exposure to low-power design and thermal management - Exposure to power macromodeling and architectural power analysis What We Offer - Competitive base pay range: $163,000—$253,000 USD - Incentive opportunities based on individual and company performance - Medical, dental, vision, and 401(k) benefits - 4+ weeks of paid time off plus holidays and sick leave - Fertility care, adoption support, medical travel support, and virtual vet care - On-demand wellness apps and confidential therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment and wellbeing-focused benefits
Technology

Samsung
Principal Engineer, SOC Design
Senior
On-site
San Jose, CA
240,000 - 249,996 USD/yr
🏢 Summary: Principal Engineer role focused on SoC design and integration for advanced memory and storage solutions targeting cloud, data center, and emerging computing applications. The position involves leading microarchitecture, RTL development, third-party IP integration, and full ASIC flow through tape-out. It requires deep expertise in high-performance SoC design, timing, and silicon bring-up. 🗂️ Requirements: Bachelor’s/Master’s/PhD in Electrical Engineering, Computer Science or related field, 15+ years of industry experience in ASIC/SoC design, Hands-on experience with full ASIC design flow from design to tape-out, Experience with SoC-level synthesis, STA, lint, and CDC checks, Experience integrating third-party IPs at SoC level, Experience with commercial IPs such as ARM cores, DDR, Ethernet, UCIe, Experience with ATE vector generation, testing, and silicon bring-up, Knowledge of PPA trade-offs, Experience working with DFT/PI/PD teams, Strong understanding of AMBA bus architecture 📃 Skills: ASIC, SoC, RTL, ARM, AMBA, DDR, UCIe, Ethernet, STA, CDC, Lint, DFT, Synthesis, PPA, ATE 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Principal Engineer, SOC Design What You'll Do The DRAM Development Lab (DDL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash. DDL's vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps. Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You'll focus on enhancement of memory and storage capability by developing prototype and production controllers. Job ID: 42866 Location: Daily onsite presence at our San Jose or Folsom office in alignment with our Flexible Work policy Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level. Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA). Reviews 3rd party IPs including ARM cores, DDR controller, and UCIe PHY Responsible for integrating the third part IPs and sub system at top level Work closely with architects and verification engineers to ensure sound design at SoC level. Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis What You Bring Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of Industry experience preferred. Highly motivated with good verbal and written communication skills. Hands on knowledge & experience in ASIC design flow from design to tape out. Experience & Good knowledge in ATE vector generation, testing and silicon bring up. Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces. Good understanding of PPA (performance, power, and area) trade-offs. Experience in SoC level synthesis, timing analysis, lint check, CDC checks. Experience in interfacing 3rd party service companies for DFT/PI/PD. Good knowledge and experience in AMBA bus fabric, ARM cores. Self-motivated problem-solver with an ability to work well in a team. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/
Technology

Samsung
Principal Engineer, RFIC
Senior
On-site
San Jose, CA
240,000 - 249,996 USD/yr
🏢 Summary: Senior RFIC Design Engineer role focused on developing next-generation low-power, low-voltage RF transceivers and mixed-signal circuits using advanced deep-submicron CMOS technologies. The position involves leading chip-level design verification, production support, and post-silicon validation while collaborating with digital and software teams. The role also includes research and implementation of advanced wireless techniques for highly integrated RFICs. 🗂️ Requirements: Bachelor’s with 20+ years, Master’s with 18+ years, or PhD with 15+ years in related field, Extensive hands-on experience in RF/Analog IC design in deep sub-micron CMOS, Experience designing LNA, Mixer, VGA, PA, VCO circuits, Ability to translate RF transceiver system requirements into circuit specifications, Experience with chip-level verification and production support, Technical leadership and mentoring experience, Post-silicon validation expertise, Proficiency with IC design CAD tools, Understanding of physical layout requirements and ability to perform critical layouts 📃 Skills: RFIC, CMOS, LNA, Mixer, VGA, PA, VCO, SerDes, DDR, ADC, DAC, Spectre, SpectreRF, Spice, Matlab, ADS 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Samsung Semiconductor Inc. (SSI) is advancing the world's technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. Advanced Circuit and Systems (ACAS) is looking for a highly skilled engineer that has strong background and hands-on experience on RFIC design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for What You'll Do Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS technologies. Lead efforts to perform chain and chip level design verification and production support tasks. Work closely with digital and software developers to develop an implementation that meets system requirements. Research in advanced wireless techniques for highly integrated RFICs What You Bring Bachelor's with 20+ years of experience or Master's with 18+ years of experiences or PhD with 15+ years of experience in a related field. Hands-on experience in designing various RF/Analog integrated circuits, such as LNA, Mixer, RF VGAs, PA, VCO, etc., in deep sub-micron CMOS technologies. Ability to comprehend RF transceiver system level requirements and translate into circuit level specifications. Excellent problem solving and analytical skills are essential. Technical leadership, mentoring, and post-silicon validation expertise are essential. Specialized knowledge in high-speed I/Os (SerDes, DDR) or data converters is a bonus. Strong knowledge on IC design CAD tools such as Spectre, SpectreRF, Spice, Matlab, and/or ADS. Thorough understanding of the physical layout requirement and ability to perform the critical layouts. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. #LI-VL1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$214,060—$341,940 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/
Technology

Samsung
Principal Engineer, RFIC
Senior
On-site
San Jose, CA
240,000 - 249,996 USD/yr
🏢 Summary: Senior RFIC engineer role focused on designing low-power RF and analog integrated circuits for next-generation RF transceivers and mixed-signal systems using advanced CMOS technologies. The position involves chip-level verification, production support, collaboration with digital/software teams, and research into advanced wireless techniques. Extensive experience in RF/analog IC design and strong expertise with RF CAD tools are required. 🗂️ Requirements: Bachelor's degree with 20+ years, Master's degree with 18+ years, or PhD with 15+ years in related field, Hands-on experience designing RF/Analog ICs such as LNA, Mixer, RF VGA, PA, and VCO, Experience with deep sub-micron CMOS technologies, Ability to translate RF transceiver system requirements into circuit specifications, Technical leadership and mentoring experience, Post-silicon validation expertise, Knowledge of IC design CAD tools, Understanding of physical layout requirements and ability to perform critical layouts 📃 Skills: RFIC, CMOS, LNA, Mixer, VGA, PA, VCO, SerDes, DDR, Spectre, SpectreRF, Spice, Matlab, ADS 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. Advanced Circuit and Systems (ACAS) is looking for a highly skilled engineer with a strong background and hands-on experience in RFIC design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits. What You'll Do - Design low-power and low-voltage RF and Analog circuits using advanced deep-submicron CMOS technologies. - Lead efforts to perform chain and chip level design verification and production support tasks. - Work closely with digital and software developers to develop implementations that meet system requirements. - Research advanced wireless techniques for highly integrated RFICs. What You Bring - Bachelor's degree with 20+ years of experience, Master's degree with 18+ years of experience, or PhD with 15+ years of experience in a related field. - Hands-on experience designing RF/Analog integrated circuits such as LNA, Mixer, RF VGAs, PA, and VCO in deep sub-micron CMOS technologies. - Ability to comprehend RF transceiver system level requirements and translate them into circuit level specifications. - Excellent problem-solving and analytical skills. - Technical leadership, mentoring, and post-silicon validation expertise. - Specialized knowledge in high-speed I/Os such as SerDes, DDR, or data converters is a bonus. - Strong knowledge of IC design CAD tools such as Spectre, SpectreRF, Spice, Matlab, and ADS. - Thorough understanding of physical layout requirements and ability to perform critical layouts. - Inclusive and collaborative working style with adaptability to diverse global norms. - Curiosity, resilience, and data-driven problem solving. What We Offer - Competitive pay range with incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off, holidays, and sick leave. - Family support benefits including fertility care, adoption support, medical travel support, and virtual vet care. - Emotional wellness support with therapy sessions and wellness apps. - Onsite café, gym, and virtual fitness classes. - Flexible work environment. - Base Pay Range: $214,060—$341,940 USD. Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates who require support. Our Commitment to Innovation and Fairness AI tools may be used to support recruitment efficiency, but all hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice Applicants must not disclose confidential or proprietary information belonging to current or former employers. Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/
Technology

Samsung
Principal Engineer, SOC Design
Senior
On-site
San Jose, CA
240,000 - 249,996 USD/yr
🏢 Summary: Senior SoC Design Principal Engineer role focused on developing memory and storage silicon solutions for machine learning, data analytics, and edge computing applications. The position involves SoC architecture, RTL design, IP integration, ASIC flow execution, and collaboration with verification and physical design teams. The offer includes comprehensive benefits, flexible work environment, and high-impact R&D work in advanced DRAM and storage technologies. 🗂️ Requirements: Bachelor's degree in Electrical Engineering, Computer Science or related field with 20+ years of experience, or Master's with 18+ years, or PhD with 15+ years, Experience with ASIC design flow from design to tape out, Experience in ATE vector generation, testing, and silicon bring-up, Knowledge of commercial IPs including UCIe, CPU, Ethernet, and DDR interfaces, Experience in SoC synthesis, timing analysis, lint checks, and CDC checks, Experience interfacing with third-party service companies for DFT/PI/PD, Knowledge of AMBA bus fabric and ARM cores, Experience with RTL implementation and top-level SoC integration, Strong verbal and written communication skills 📃 Skills: ASIC, RTL, SoC, ARM, AMBA, DDR, UCIe, Ethernet, CDC, STA, DFT, Lint, Synthesis, ATE, Verilog 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Principal Engineer, SOC Design What You'll Do The DRAM Development Lab (DDL) is part of Samsung's Memory Business Unit, focused on solving key problems of Cloud & Data center by developing new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions and works closely with development teams to bring feature innovation to product roadmaps. Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You'll focus on enhancement of memory and storage capability by developing prototype and production controllers. - Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level - Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA) - Review 3rd party IPs including ARM cores, DDR controller, and UCIe PHY - Responsible for integrating the third party IPs and subsystem at top level - Work closely with architects and verification engineers to ensure sound design at SoC level - Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis What You Bring - Bachelor's in Electrical, Computer Science or related with 20+ years of experience or Master's with 18+ years or PhD with 15+ years of industry experience preferred - Hands-on knowledge and experience in ASIC design flow from design to tape out - Experience and knowledge in ATE vector generation, testing and silicon bring up - Experience in commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces - Good understanding of PPA (performance, power, and area) trade-offs - Experience in SoC level synthesis, timing analysis, lint check, CDC checks - Experience interfacing with 3rd party service companies for DFT/PI/PD - Good knowledge and experience in AMBA bus fabric and ARM cores - Strong communication and collaboration skills What We Offer - Incentive opportunities based on individual and company performance - Medical, Dental, Vision, and 401k benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand wellness apps and confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD
Technology

Samsung
Staff, CPU Architecture & Performance Research Engineer
Senior
On-site
San Jose, CA
🏢 Summary: Staff CPU Architecture & Performance Research Engineer role focused on deep microarchitectural performance analysis and optimization of current and next-generation RISC-V CPU cores. The position involves building performance models, analyzing real-world workloads, and driving data-driven architectural improvements in collaboration with cross-functional hardware and software teams. The work directly influences core design decisions and may lead to patents and publications. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science or related field, 5+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM or x86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines and speculation, Strong knowledge of cache coherence, memory systems, prefetching and NUMA, Hands-on experience with architectural simulators, Strong programming skills in C/C++ and Python, Experience analyzing large performance datasets and traces, Prior tapeout experience 📃 Skills: RISC-V, ARM, x86, gem5, C, C++, Python, SPEC, NUMA, SIMD 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Staff, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42850 Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem). Build, extend, and validate architectural performance models and simulators. Perform CPI/IPC breakdowns and root-cause performance bottlenecks. Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models. Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces). Translate performance data into clear architectural recommendations. Work leading to patents and publication. What You Bring Master's in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience. 5+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Experience analyzing large performance datasets and traces. Familiarity with compiler optimizations and hardware/software co-design.. Proven ability - prior tapeout experience. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads.. Prior leadership guiding junior engineers. Prior patent / publication experience. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/