Staff Scientist PIC Laser

🏢 Summary: Senior Mixed Signal Electrical Engineer role focused on designing and maturing advanced electrical prototypes for space systems, including custom motor controllers, embedded systems, and power electronics for flight-ready applications. The position involves analog and digital circuit design, PCB development, testing, debugging, and cross-functional collaboration in a fast-paced aerospace startup environment. 🗂️ Requirements: Bachelor's degree in Electrical Engineering or related STEM field, 7+ years of hands-on electrical engineering experience, Experience developing hardware for aerospace, defense, robotics, or similar industries, Experience designing analog circuitry, Experience designing digital circuitry and output drivers, Experience working with embedded systems, Proficiency in circuit design, schematic creation, and component selection, Experience with schematic and PCB design tools, Experience building and testing electrical systems or prototypes, Strong understanding of electronics fundamentals and system integration, Ability to troubleshoot circuits and debug hardware, Hands-on experience with lab equipment, Experience collaborating with PCB fabrication and assembly vendors, Ability to work in a fast-paced startup environment, U.S. citizenship, permanent residency, or eligibility under ITAR regulations, Ability to obtain or maintain Government Security Clearance 📃 Skills: Altium, PCB, Embedded, C, Microcontrollers, Sensors, Electronics, Oscilloscopes, Multimeters, Power, Schematics, ICDs, BOMs, Debugging, Testing, Circuitry 🏢 Description: A New Paradigm For Space Operations. Who We Are: Drones have fundamentally changed the nature of conflict and maneuver. The next theater to be changed by drone technology is space. Space Kinetic is a space technology startup company building a completely new architecture for space operations – one that brings the advantages of drone technology to space missions without relying on consumable fuel. This is not a role for someone looking for a traditional 40-hour work week.Space Kinetic is building ambitious, first-of-its-kind technology, and that requires urgency, ownership, anda high levelof commitment to changing the foundational assumptions for everything we do in space. Position Overview: The Senior Electrical Engineer, Power Electronics & Embedded Systems (Mixed Signal) will play a critical role in designing, building, and maturing prototypes for Space Kinetic's core technology. You will design systems that process both analog and digital signals and bridge the gap between real-world physical inputs like pressure and temperature sensors and the processor in an embedded system. With your knowledge of analog electronics, you will design signal conditioning circuitry and with additional knowledge of discrete electronic components and integrated circuits, you will help design actuator controllers like the driver circuitry required in a motor controller and the interfaces to power electronics. You will support the team in refining the electrical architecture of the current prototype and driving the system closer to a flight-ready configuration with each iteration.Your first project will involve a custom motor controller with power levels never before implemented in space and an electromechanical system with novel energy recycling functions. This role is ideal for someone who enjoys taking concepts from schematic to hardware, solving complex electrical challenges, and working closely with mechanical and manufacturing teams to bring cutting-edge space hardware to life. What You'll Do: Design, develop, and build electrical prototypes for Space Kinetic's core technology. Refine and finalize the current prototype's electrical design to support all phases of prototype maturation. Undertake and complete circuit design tasks, generate detailed schematics, and perform component selection aligned with environmental and system requirements. Apply detailed tolerancing, design-for-manufacture principles, and thorough documentation across all electrical prototype phases. Support PCB layout design and coordinate with external vendors for fabrication and assembly of PCB components. Collaborate closely with the Space Kinetic manufacturing and engineering team to integrate electrical systems into mechanical assemblies. Verify and validate your electrical designs through testing, troubleshooting, debugging, and iteration to improve system reliability and performance. Actively participate in design reviews, contribute to system-level engineering discussions, and ensure the electrical subsystem progresses toward flight-readiness. Support the creation and maintenance of electrical documentation, including BOMs, wiring diagrams, interface control documents (ICDs), and test procedures. Ensure each design iteration moves the system closer to a flight-ready prototype aligned with Space Kinetic's 2-year flight demonstration goal. What It Takes: Basic Qualifications: Bachelor's degree in electrical engineering or a closely related STEM (Science, Technology, Engineering and Mathematic) field. Experience developing hardware for aerospace, defense, robotics, or similarly rigorous applications. A minimum of 7 years of hands-on electrical engineering experience, ideally involving prototype development. Experience designing analog circuitry such as signal conditioning circuitry. Experience designing digital circuitry and output drivers such as gate drivers and motor drivers. Experience working with embedded systems. Proficiency in circuit design, schematic creation, and component selection. Experience working with Schematic / PCB design tools (e.g., Altium). Demonstrated experience building and testing electrical systems or prototypes. Strong understanding of electronics fundamentals, wiring practices, and system integration. Ability to troubleshoot circuits, debug hardware, and iterate rapidly. Hands-on experience with lab equipment (oscilloscopes, multimeters, power supplies, logic analyzers). Experience collaborating with vendors for PCB fabrication and assembly. Excellent documentation, communication, and cross-functional collaboration skills. Ability to work in a fast-paced startup environment with evolving requirements. To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder). Ability to maintain or obtain a Government Security Clearance. Preferred Qualifications A minimum of 9 years of hands-on electrical engineering experience. Experience in developing embedded systems. Experience in developing power electronics. Experience with the C programming language. Knowledge of field-oriented controls, microcontrollers, sensors, and power electronics. Experience with environmental or functional testing of electrical systems. *Our vision is unique, and so is the team we're building. If you're driven to succeed in this role, even if your background doesn't fully align with every qualification, we want your application. Where You'll Be: The position will be on site at our headquarters in El Segundo, CA. What We Offer: Competitive Base Salary + Equity-Based Compensation Highly Competitive PTO and Holiday Calendar Comprehensive Medical, Dental, and Vision Coverage Unique Performance-Based Bonus Structure ITAR Requirements: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about ITAR here Equal Employment Opportunity: Space Kinetic provides equal employment opportunities to all employees and applicants without regard to race, color, religion, age, sex, gender identity, sexual orientation, national origin, veteran status, disability or any other legally protected status. The annual base salary for this role is below. Pay Grades aredeterminedby role, level, location, and alignment with market data.Individual pay will be determined on a case-by-case basis and may vary based on the following considerations: interviews and an assessment of several factors that are unique to each candidate, job-related skills, relevant education/experience, certifications, abilities of the candidate and internal equity. Pay Range $140,000 – $180,000The annual base salary for this role is below. Pay Grades are determined by role, level, location, and alignment with market data. Individual pay will be determined on a case-by-case basis and may vary based on the following considerations: interviews and an assessment of several factors that are unique to each candidate, job-related skills, relevant education/experience, certifications, abilities of the candidate and internal equity. Pay Range$140,000—$180,000 USD

🏢 Summary: Opportunity for an Electrical Hardware Design Engineer to lead the end-to-end design and development of circuit cards and electronics hardware for spacecraft and mission-critical aerospace systems. The role involves hands-on schematic capture, PCB layout, bring-up, testing, and integration of analog, digital, mixed-signal, and power electronics in demanding space environments. This is a highly technical, on-site position requiring ownership of flight hardware from concept through production. 🗂️ Requirements: Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field, 3+ years of professional electrical engineering experience, Experience designing circuit cards, schematics, and PCBs for spacecraft, aerospace, defense, or high-reliability applications, Experience with spacecraft hardware or spacecraft electrical systems, Experience with flight systems, avionics, or mission-critical electrical hardware, Strong knowledge of analog and digital circuit design, Experience with schematic capture and PCB design using Altium Designer, Experience owning board-level hardware through design, layout, bring-up, debugging, and testing, Experience with component selection and technical documentation, U.S. citizenship or lawful permanent residency (ITAR compliance), Ability to maintain or obtain a Government Security Clearance 📃 Skills: Altium, PCB, Analog, Digital, Mixed-signal, Power, EMI, EMC, Avionics, Embedded, Signal-integrity, Thermal, Vibration, Vacuum, ITAR 🏢 Description: A New Paradigm For Space Operations. Who We Are: Space Kinetic is a dual use space technology startup building a completely new architecture for space operations – one that brings the advantages of proliferated drone technology (low-cost, operationally flexible, attainable, distributed) to space missions while reducing the ecosystem's reliance on consumable fuel. In a world where many companies are focused on incrementally improving the status quo, we are focused on creating something entirely different – an architecture underpinned by new first principles to meet the opportunities and challenges of the third space age head-on. Our goal is to move away from one-to-one space architectures – where each satellite in a constellation has one (or a small # of) primary payloads attached to the bus -- and unlock a 'one-to-many' system, where each satellite has a large number of payloads which can be deployed from their host spacecraft at high velocities without firing a thruster. This is not a role for someone looking for a traditional 40-hour work week. Space Kinetic is building ambitious, first-of-its-kind technology, and that requires urgency, ownership, and a high level of commitment to changing the foundational assumptions for everything we do in space. What You'll Do: As a Senior Electrical Hardware Design Engineer you will own the design, development, integration, and testing of circuit cards and related electronics hardware for spacecraft and other advanced aerospace and defense systems. You will work closely with mechanical, software, systems, manufacturing, and test engineers to develop space rated flight hardware that performs reliably in demanding environments. Design, develop, and validate schematics, PCB layouts, circuit cards, electrical interfaces, and supporting electronics hardware. Own circuit card design from concept through schematic capture, PCB layout, bring-up, debugging, testing, and release. Develop analog, digital, mixed-signal, and power electronics designs for embedded systems, sensors, actuators, controllers, and related flight hardware. Perform component selection, circuit analysis, worst-case analysis, derating reviews, and design trade studies. Support PCB stack-up definition, grounding strategies, signal integrity considerations, power integrity considerations, and EMI/EMC design practices. Work closely with mechanical and thermal teams to support electronics packaging, board-level thermal management, heat dissipation strategies, and environmental constraints. Develop and execute electrical test plans for circuit cards, subsystems, and integrated hardware. Collaborate with firmware, software, and controls teams to integrate electronics hardware with embedded processors, sensors, communication interfaces, and control systems. Support design for manufacturability, design for test, prototype builds, supplier coordination, and transition from engineering development to repeatable production. Drive rapid design iterations in a hands-on development environment where hardware is designed, built, tested, and improved quickly. What It Takes: Basic Qualifications: Bachelor's degree in Electrical Engineering, Computer Engineering, or related engineering discipline. 7+ years of professional electrical engineering experience. Experience designing electrical hardware, circuit cards, schematics, and PCBs for spacecraft, satellites, aerospace, defense, or other high-reliability applications. Experience working on spacecraft hardware or spacecraft electrical systems. Experience with flight systems, flight electronics, avionics, or other mission-critical electrical hardware. Strong understanding of analog and digital circuit design. Experience with schematic capture and PCB design using Altium Designer. Experience owning board-level hardware through design, layout, bring-up, debugging, and testing. Experience selecting components and working with datasheets, reference designs, and supplier documentation. Strong engineering fundamentals and ability to make sound design decisions with incomplete information. Preferred Qualifications Master's degree in Electrical Engineering, Computer Engineering, or related field. 9+ years of experience designing electronics for spacecraft, satellites, launch vehicles, missile systems, aircraft, defense systems, or other mission-critical hardware. Experience with flight-qualified or flight-intent hardware development. Experience with mixed-signal PCB design, power electronics, motor controllers, sensor interfaces, battery-powered systems, or embedded control hardware. Experience with board-level thermal management, electronics packaging, heat sinking, thermal interfaces, and thermal testing. Experience with high-density PCB design, impedance-controlled routing, grounding strategies, stack-up definition, and signal integrity best practices. Knowledge of EMI/EMC design practices and qualification testing. Experience with environmental testing including vibration, shock, thermal, and vacuum testing. Experience working with PCB fabricators, contract manufacturers, component suppliers, and external test labs. Familiarity with aerospace standards, high-reliability design practices, and configuration-controlled hardware development. To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder). Ability to maintain or obtain a Government Security Clearance. What You'll Bring Strong technical judgment and engineering fundamentals. A hands-on approach to electrical design, debugging, and problem solving. Deep interest in circuit card design and the details that make electronics reliable in real-world environments. Ability to work across electrical, mechanical, thermal, software, manufacturing, and systems engineering disciplines. Comfort operating in an environment with ambitious schedules, evolving requirements, and challenging technical goals. A practical understanding of how design choices affect manufacturability, testability, reliability, and performance. A desire to see hardware through the full lifecycle — from concept and schematic design to PCB layout, bring-up, qualification, integration, and fielded operation. *Our vision is unique, and so is the team we're building. If you're driven to succeed in this role, even if your background doesn't fully align with every qualification, we want your application. Where You'll Be: The position will be on site at our headquarters in El Segundo, CA. What We Offer: Equity-Based Compensation Highly Competitive PTO and Holiday Calendar Comprehensive Medical, Dental, and Vision Coverage Unique Performance-Based Bonus Structure ITAR Requirements: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about ITAR here Equal Employment Opportunity: Space Kinetic provides equal employment opportunities to all employees and applicants without regard to race, color, religion, age, sex, gender identity, sexual orientation, national origin, veteran status, disability or any other legally protected status. The annual base salary for this role is below. Pay Grades aredeterminedby role, level, location, and alignment with market data.Individual pay will be determined on a case-by-case basis and may vary based on the following considerations: interviews and an assessment of several factors that are unique to each candidate, job-related skills, relevant education/experience, certifications, abilities of the candidate and internal equity. The annual base salary for this role is below. Pay Grades are determined by role, level, location, and alignment with market data. Individual pay will be determined on a case-by-case basis and may vary based on the following considerations: interviews and an assessment of several factors that are unique to each candidate, job-related skills, relevant education/experience, certifications, abilities of the candidate and internal equity. Pay Range$120,000—$160,000 USD

🏢 Summary: Principal-level role focused on researching and optimizing next-generation CPU microarchitectures, including RISC-V cores, through performance analysis, simulation, and workload characterization. The position involves cross-functional collaboration with architecture, compiler, OS, and design teams to improve system performance and efficiency across real-world workloads. Candidates will lead technical initiatives, mentor engineers, and contribute to patents and publications. 🗂️ Requirements: Master’s degree with 18+ years in Computer Engineering, Computer Science, or related field, or PhD with 15+ years, 10+ years of CPU microarchitecture or performance engineering experience, Experience with RISC-V, ARM, or X86 architectures, Knowledge of out-of-order execution, branch prediction, pipelines, and speculation, Knowledge of cache coherence, memory systems, prefetching, and NUMA, Experience with architectural simulators, Programming skills in C/C++ and Python, Experience with compiler optimizations and hardware/software co-design, Experience analyzing large performance datasets and traces, Ability to influence architecture decisions through quantitative analysis 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, SIMD, VME, NUMA, RTL, SPEC 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. This opportunity offers the chance to contribute to next-generation CPU technologies and performance optimization. What You'll Do Architecture Research Lab is seeking a Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role focuses on end-to-end performance, including architectural trade-offs, workload characterization, micro-architectural modeling, simulation, and silicon bring-up correlation. You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. Responsibilities - Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect) - Lead performance analysis using simulators and RTL - Help develop and validate performance models (cycle-accurate, trace-driven, statistical) - Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements - Identify performance bottlenecks and propose data-driven optimizations - Drive architecture-to-implementation alignment with design team - Collaborate with compiler, OS, and system architects on cross-stack performance issues - Mentor senior and staff engineers and provide technical leadership across projects - Contribute to patents and publications What You Bring - Master’s degree with 18+ years of experience in Computer Engineering, Computer Science, or related field, or PhD with 15+ years preferred - 10+ years of experience in CPU microarchitecture and/or performance engineering - Experience with RISC-V, ARM, or X86 architectures - Strong understanding of out-of-order execution, branch prediction, pipelines, speculation, cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators such as gem5 - Strong programming skills in C/C++ and Python - Familiarity with compiler optimizations and hardware/software co-design - Familiarity with SIMD, vectors, and VME for AI inference workloads - Experience analyzing large performance datasets and traces - Proven ability through tapeouts, patents, or publications to influence architecture and microarchitectural decisions through quantitative analysis Preferred Qualifications - Background in power/performance/area (PPA) trade-off analysis - Experience with SIMD and vector technologies - Prior technical leadership at Senior Staff or Principal level Benefits - Competitive compensation and incentive opportunities - Medical, dental, vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility, adoption, and medical travel support - Emotional wellness support including therapy sessions and wellness apps - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range: $219,000—$351,000 USD

🏢 Summary: Senior CPU Architecture & Performance Engineer role focused on performance analysis and microarchitectural optimization of current and next-generation RISC-V CPU cores. The position involves architectural simulation, bottleneck analysis, workload characterization, and automation of performance studies in collaboration with architecture and design teams. The role is onsite in San Jose and includes opportunities for patents and publications. 🗂️ Requirements: Master's or PhD in Computer Engineering, Computer Science, or related field, 2+ years of experience in CPU microarchitecture or performance engineering, Strong understanding of out-of-order execution, branch prediction, pipelines, and speculation, Strong understanding of cache coherence, memory systems, prefetching, and NUMA effects, Hands-on experience with architectural simulators, Strong programming skills in C/C++, Strong programming skills in Python, Experience analyzing large performance datasets and traces, Familiarity with compiler optimizations, Familiarity with hardware/software co-design 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, NUMA, SIMD, VME 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do Architecture Research Lab is seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads. You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains. - Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers. - Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics). - Identify performance bottlenecks in frontend, execution engine, or memory subsystems. - Assist in evaluating design trade-offs using trace-driven or cycle-accurate models. - Characterize workloads and benchmarks (SPEC, server, client, internal traces). - Develop scripts and tools to automate performance analysis. - Work leading to patents and publication. What You Bring - Master's, or PhD in Computer Engineering, Computer Science, or related field. - 2+ years of experience in CPU microarchitecture and/or performance engineering. - Strong understanding of: - Out-of-order execution, branch prediction, pipelines, and speculation - Cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators (like gem5). - Strong programming skills in C/C++ and Python. - Experience analyzing large performance datasets and traces. - Familiarity with compiler optimizations and hardware/software co-design. Preferred Qualifications - Experience with RISC-V, ARM or X86 architectures. - Background in power/performance/area (PPA) trade-off analysis. - Familiarity with SIMD / Vectors / VME for AI inference workloads. - Prior tapeout / patent / publication experience. - You're inclusive, adapting your style to the situation and diverse global norms of our people. - You approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Medical/Dental/Vision/401k benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand apps and free confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment - Base Pay Range: $138,000—$206,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies with a valid agreement may submit resumes for job openings. Applicant AI Use Policy Generative AI tools may not be used to misrepresent a candidate's skills or qualifications during the hiring process. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Senior onsite analog/mixed-signal IC design role focused on high-speed SerDes transceiver architecture and circuit development for next-generation interconnect technologies. The position involves designing, simulating, validating, and optimizing low-power analog and custom digital circuits using advanced CMOS processes and EDA tools. 🗂️ Requirements: Bachelor's degree with 10+ years, Master's degree with 8+ years, or PhD with 5+ years of relevant experience, 2+ years of RF/Analog/SerDes SoC design experience, Experience with analog and mixed-signal circuits, Knowledge of SerDes IP circuits including CTLE, DFE, FFE, clock distribution, PI, and IQ generation, Knowledge of SerDes architecture and high-speed interconnect standards, Experience with EDA tools, Experience with scripting languages such as Python or Matlab, Ability to design, simulate, validate, and optimize analog/custom digital circuits 📃 Skills: CMOS, SerDes, RF, Analog, Mixed-signal, CTLE, DFE, FFE, PLL, ADC, DAC, ESD, Cadence, Spectre, Totem, EMX, Python, Matlab, USB, PCIe, UCIe, Ethernet, LDO 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world's technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. What You'll Do In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver (Serdes). You will work on circuits for Serdes IPs, clock generation as well as traditional analog circuits. You'll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies. Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability. Supervise layout designers to generate LVS/DRC clean layout. Optimize layout to improve the power consumption and performance of circuits. Functionality and performance validation in Silicon. What You Bring - Bachelors with 10+ years, Masters with 8+ years or PhDs with 5+ years of experience. - Minimum 2+ yrs experience RF/Analog/Serdes SoC design experience. - Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters. - Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. - Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe). - Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus. - Well-versed in EDA tools (Cadence, Spectre, Totem, EMX). - Comfortable with scripting languages (Python, Matlab). - You're inclusive, adapting your style to the situation and diverse global norms of our people. - An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to Medical/Dental/Vision/401k, the rewards plan includes: - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Fertility care or adoption stipend, medical travel support, and virtual vet care. - On-demand wellness apps and free confidential therapy sessions. - Onsite café and gym, plus virtual fitness classes. - Flexible work environment and work-life balance support. Base Pay Range: $157,000—$243,000 USD. Equal Opportunity Employment Policy Samsung Semiconductor is dedicated to fostering an inclusive environment where individuals are valued regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Comprehensive accommodations are available throughout the recruiting process for candidates with disabilities, long-term conditions, neurodivergence, or pregnancy-related support. Our Commitment to Innovation and Fairness AI tools may be used in recruitment to support efficiency, but hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Staff CPU Architecture & Performance Research Engineer role focused on deep microarchitectural performance analysis and optimization of current and next-generation RISC-V CPU cores. The position involves building performance models, analyzing real-world workloads, and driving data-driven architectural improvements in collaboration with cross-functional hardware and software teams. The work directly influences core design decisions and may lead to patents and publications. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science or related field, 5+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM or x86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines and speculation, Strong knowledge of cache coherence, memory systems, prefetching and NUMA, Hands-on experience with architectural simulators, Strong programming skills in C/C++ and Python, Experience analyzing large performance datasets and traces, Prior tapeout experience 📃 Skills: RISC-V, ARM, x86, gem5, C, C++, Python, SPEC, NUMA, SIMD 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Staff, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42850 Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem). Build, extend, and validate architectural performance models and simulators. Perform CPI/IPC breakdowns and root-cause performance bottlenecks. Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models. Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces). Translate performance data into clear architectural recommendations. Work leading to patents and publication. What You Bring Master's in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience. 5+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Experience analyzing large performance datasets and traces. Familiarity with compiler optimizations and hardware/software co-design.. Proven ability - prior tapeout experience. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads.. Prior leadership guiding junior engineers. Prior patent / publication experience. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Principal FPGA Engineer role focused on architecting and leading development of a massively parallel, ultra-low latency FPGA compute platform for real-time ML inference and industrial laser control. The position involves building distributed FPGA systems integrated with GPUs, developing advanced RTL and signal processing pipelines, and collaborating across software and hardware engineering teams. Full-time onsite work in Hawthorne with competitive compensation, equity, and comprehensive benefits. 🗂️ Requirements: Bachelor's degree in computer engineering, electrical engineering, computer science, or related field, 15+ years of FPGA development experience, Experience with SystemVerilog or VHDL, Familiarity with Xilinx Vivado/Vitis toolchain, Experience with high-speed IO, Experience with board bring up, Ability to work full-time onsite 📃 Skills: FPGA, SystemVerilog, VHDL, Vivado, Vitis, Xilinx, Zynq, MPSoC, RTL, DSP, Linux, SoC, C, C++, GPU 🏢 Description: Freeform builds AI-native manufacturing systems that unify software, hardware, and physics to produce industrial-scale parts at the speed of human ideation. By treating manufacturing as a single integrated system, the company enables complex hardware to be designed, built, and scaled without limits. As a Principal FPGA Engineer, you will architect and lead development of a next-generation compute platform, a distributed system of hundreds of FPGAs orchestrating many dozens of high-power lasers in real time. This role focuses on processing hundreds of thousands of frames per second through a real-time ML inference pipeline with ultra-low latency requirements. The position involves leveraging cutting-edge silicon including the Xilinx Zynq Ultrascale+ MPSoC and tightly coupling FPGA fabric with GPUs to build a heterogeneous computing platform. The role centers on pioneering FPGA-based real-time machine learning in an industrial manufacturing environment and contributing core IP work at the frontier of FPGA computing. 3D printing experience is not required. The role seeks collaborative engineers who enjoy solving difficult technical challenges. Responsibilities: - Architect a massively parallel, ultra-low latency FPGA pipeline capable of processing hundreds of thousands of frames per second across a fleet of hundreds of FPGAs - Lead cross-disciplinary engineering efforts spanning software, electrical, and process engineering to advance FPGA capabilities at the system level - Design and implement real-time ML inference capability directly on FPGA fabric - Develop novel RTL components and IP blocks focused on timing closure, resource utilization, and deterministic latency - Implement high-performance signal processing algorithms on FPGA, including custom arithmetic, filtering, and feature extraction at line rate - Design deterministic, microsecond-precision controllers for high-power laser systems operating under strict real-time constraints Basic Qualifications: - Bachelor's degree in computer engineering, electrical engineering, computer science, or related field - 15+ years of FPGA development experience in SystemVerilog or VHDL - Familiarity with Xilinx Vivado/Vitis toolchain development environment - Experience with high-speed IO, board bring up, and hardware-centric FPGA development Nice to Have: - Master's degree in computer engineering, electrical engineering, computer science, or related field - Experience with image processing or DSP - Experience with Xilinx Zynq Ultrascale+ MPSoC - Experience with embedded software development including embedded Linux and SoC-based architectures - Experience implementing advanced computations on FPGAs - Experience with heterogeneous computing platforms and high-speed data acquisition systems - Familiarity with C/C++ or other programming languages - Excellent verbal and written communication skills - Creative problem-solving ability using first-principles reasoning Location: Based in Hawthorne, the role requires full-time onsite presence five days a week with very limited exceptions. What We Offer: Benefits: - Significant stock option packages - 100% employer-paid Medical, Dental, and Vision insurance - Life insurance - Traditional and Roth 401(k) - Relocation assistance provided - Paid vacation, sick leave, and company holidays - Paid parental leave and extended transition back to work for birthing parent - Free daily catered lunch and dinner - Casual dress and flexible work hours - Regular catered team building events Compensation: The estimated salary range for this role is $250,000-$350,000 per year, in addition to stock options. Compensation is based on experience, education, and demonstrated skills.

🏢 Summary: Lead Systems Engineer role focused on owning launch vehicle system requirements, architecture development, and system-level integration for advanced space missions. The position involves leading multidisciplinary teams, managing verification and validation, and supporting launch campaigns and flight operations. This is a senior, hands-on technical leadership role in a fast-paced aerospace environment requiring security clearance eligibility. 🗂️ Requirements: Bachelor's degree in Aerospace, Mechanical, Electrical, Systems Engineering or related field, 10+ years of engineering experience in aerospace, defense, launch vehicles, spacecraft, missile, or high-reliability systems, Experience developing and managing system requirements, Experience leading multidisciplinary technical teams, Experience with system integration, verification, and validation, Strong understanding of systems engineering principles and lifecycle development, U.S. citizen or lawful permanent resident (export regulations compliance), Ability to obtain and maintain Government Security Clearance 📃 Skills: MBSE, Cameo, MagicDraw, Capella, DOORS, Jama, ICDs, SRR, PDR, CDR, TRR, FRR, GNC, Avionics, Propulsion, SystemsEngineering, Verification, Validation 🏢 Description: A New Paradigm For Space Operations. Who We Are: Space Kinetic is a dual use space technology startup building a completely new architecture for space operations – one that brings the advantages of proliferated drone technology (low-cost, operationally flexible, attainable, distributed) to space missions while reducing the ecosystem's reliance on consumable fuel. In a world where many companies are focused on incrementally improving the status quo, we are focused on creating something entirely different – an architecture underpinned by new first principles to meet the opportunities and challenges of the third space age head-on. Our goal is to move away from one-to-one space architectures – where each satellite in a constellation has one (or a small # of) primary payloads attached to the bus -- and unlock a 'one-to-many' system, where each satellite has a large number of payloads which can be deployed from their host spacecraft at high velocities without firing a thruster. This is not a role for someone looking for a traditional 40-hour work week. Space Kinetic is building ambitious, first-of-its-kind technology, and that requires urgency, ownership, and a high level of commitment to changing the foundational assumptions for everything we do in space. What You'll Do: We are seeking a Lead Systems Engineer to be a key contributor to our current programs. Own the development, allocation, and management of launch vehicle system requirements. Lead vehicle-level architecture development and system design trades. Define and maintain requirements traceability from mission objectives through subsystem implementation and verification. Coordinate technical activities across propulsion, structures, avionics, software, GNC, manufacturing, and test organizations. Lead system-level integration efforts and identify interface requirements between vehicle subsystems. Develop and maintain Interface Control Documents (ICDs), system specifications, and verification plans. Support design reviews including SRR, PDR, CDR, TRR, FRR, and other program milestones. Lead technical risk identification, mitigation planning, and resolution activities. Support anomaly investigations, root cause analyses, and corrective actions during testing and flight operations. Define system verification and validation strategies and ensure successful execution. Support launch campaigns, integrated vehicle testing, and flight readiness activities. Serve as a technical leader and mentor for systems engineering processes and best practices. What It Takes: Bachelor's degree in Aerospace Engineering, Mechanical Engineering, Electrical Engineering, Systems Engineering, or related technical discipline. 10+ years of engineering experience with complex aerospace, defense, launch vehicle, spacecraft, missile, or high-reliability systems. Experience developing and managing system requirements. Experience leading multidisciplinary technical teams. Experience with system integration, verification, and validation activities. Strong understanding of systems engineering principles and lifecycle development. Excellent communication and technical leadership skills. To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder). Applicants selected will be subject to a security investigation and may need to meet eligibility requirements for access to classified information; Ability to maintain or obtain a Government Security Clearance is required. Preferred Qualifications: Master's degree in Engineering or related technical field. Experience with launch vehicles, spacecraft, satellites, missile systems, or defense aerospace programs. Experience leading System Requirements Reviews (SRR), Preliminary Design Reviews (PDR), and Critical Design Reviews (CDR). Experience developing and managing Interface Control Documents (ICDs). Familiarity with MBSE tools such as Cameo, MagicDraw, Capella, or similar platforms. Experience with requirements management tools such as DOORS, Jama, or equivalent. Understanding of mission analysis, flight operations, and launch vehicle architecture. Experience supporting flight test programs and launch campaigns. Active security clearance or ability to obtain and maintain one. What We'd Love: Strong systems thinking and problem-solving skills. Ability to balance technical detail with vehicle-level decision making. Comfort working across organizational boundaries and engineering disciplines. Strong ownership mentality and ability to drive issues to closure. Ability to thrive in a fast-paced startup environment where rapid iteration and execution are critical. Where You'll Be: The position is onsite at our headquarters in El Segundo, CA. What We Offer: Equity-Based Compensation Highly Competitive PTO and Holiday Calendar Comprehensive Medical, Dental, and Vision Coverage Unique Performance-Based Bonus Structure Health and Wellness Stipend Commuter Benefits ITAR Requirements: To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Equal Employment Opportunity: Space Kinetic provides equal employment opportunities to all employees and applicants without regard to race, color, religion, age, sex, gender identity, sexual orientation, national origin, veteran status, disability or any other legally protected status. The annual base salary for this role is below. Pay Grades are determined by role, level, location, and alignment with market data. Individual pay will be determined on a case-by-case basis and may vary based on interviews, job-related skills, relevant education/experience, certifications, abilities of the candidate and internal equity. Pay Range $90,000—$110,000 USD

🏢 Summary: Onsite Optical Designer and Analyst role focused on designing, analyzing, and optimizing space-based optical communication systems, including free-space and high-speed laser applications. The position leads the full optical system lifecycle from concept through prototyping, ensuring performance, manufacturability, and integration into spacecraft or ground platforms. Ideal for an experienced optical engineer with strong simulation expertise and cross-disciplinary collaboration skills. 🗂️ Requirements: Bachelor’s degree in Optics, Mechanical Engineering, Electrical Engineering, Telecommunications Engineering, Physics, or related field, Proven experience in optical system design for space-based or high-precision instruments, Extensive experience with optical design software (e.g., ZEMAX), Experience with mechanical design tools (e.g., SolidWorks or Siemens NX), Ability to perform tolerance, wavefront, radiometric, and propagation analysis, Eligibility to comply with U.S. export control regulations (ITAR) 📃 Skills: ZEMAX, SolidWorks, SiemensNX, Optics, Optomechanics, Radiometry, Wavefront, ITAR, FiberOptics, Lasers 🏢 Description: The Role The Optical Designer and Analyst will be responsible for designing, analyzing, and optimizing optical systems for space-based communication technologies. This role requires hands-on experience with optical design software, a strong background in optics, and the ability to collaborate across disciplines to deliver optical designs that are both innovative and capable of cost-effective mass production. Location: Onsite in Broomfield, Colorado office Travel: Up to 5% Responsibilities - Lead the full lifecycle of optical systems, including conceptualization, simulation, detailed design, and prototyping, with focus on free-space optical communication systems and high-speed laser applications. - Conduct in-depth analysis using optical design software to optimize system performance, including manufacturing and alignment tolerances, wavefront error, radiometric analysis, free-space far-field propagation, and fiber coupling efficiency. - Collaborate with mechanical, electrical, software, and control engineering teams to integrate optical subsystems into spacecraft or ground-based platforms. - Develop and implement optomechanical design and analysis strategies, including Structural-Thermal-Optical Performance analysis for space environments. - Write and maintain technical documentation for designs, analyses, and test procedures; mentor and transfer knowledge to team members. Qualifications - Bachelor’s degree or higher in Optics, Mechanical Engineering, Electrical Engineering, Telecommunications Engineering, Physics, or related technical field. - Proven experience in optical system design, particularly for space-based or high-precision optical instruments. - Extensive experience with optical design software (e.g., ZEMAX) and mechanical design tools (e.g., SolidWorks, Siemens NX). - Must meet U.S. Government export control regulations (ITAR) requirements. Preferred Qualifications - Experience with optical design for space-flight systems or astronomy. - Experience working in a cleanroom environment (ISO 5 to ISO 8). - Spanish speaking is a plus. Compensation and Benefits - Base salary range: $116,736 - $152,250, plus bonus and equity. - Comprehensive medical, dental, and vision plans. - 401(k) with company match. - Unlimited PTO and paid holidays. - Parental/adoption leave. - Legal insurance. - Home technology stipend. Employment is contingent upon compliance with U.S. export control and government contract restrictions.

🏢 Summary: Software Engineer – Perception role focused on developing real-time computer vision and machine learning algorithms for autonomous space systems. The position involves designing, training, optimizing, and deploying perception models for detecting, classifying, and estimating the pose of dynamic space targets. The engineer will integrate ML models into real-time autonomy pipelines and simulation environments for orbital defense applications. 🗂️ Requirements: Bachelor's or Master's degree in AI/ML, Computer Science, Robotics or related field, Minimum 2 years industry experience in Machine Learning, robotics or computer vision, Strong programming skills in C++, Strong programming skills in Python, Experience with DNN and Machine Learning models, Experience with computer vision and image processing libraries, Experience developing and deploying ML models to real-time systems, Broad understanding of perception systems architecture, U.S. citizenship or eligibility under ITAR regulations 📃 Skills: C++, Python, MachineLearning, DeepLearning, ComputerVision, OpenCV, CUDA, PCL, TensorRT, RADAR, LIDAR, AWS, GCP, Azure, Linux, Git, Docker, Kubernetes, CI/CD 🏢 Description: About Lodestar Lodestar's mission is to develop the first "Protect and Defend" capability for high-value space assets in orbit. Our flagship product MITHRIL is the critical hardware & software necessary to augment any off-the-shelf spacecraft with the ability to autonomously detect, characterise, and reversibly neutralise orbital threats. By building on the proven space heritage of our best-in-class satellite-bus partners and fully integrating MITHRIL as a single platform, we deliver a fully autonomous end-to-end protection spacecraft service. About the Job As a Software Engineer - Perception at Lodestar, you'll be joining the perception and machine vision teams to rapidly grow our vision and perception models at MITHRIL's center. You'll focus on researching and building algorithms to detect, classify and understand unknown space targets in real-time. By combining computer vision, image processing and machine learning, you'll develop custom models - providing the foundation for autonomous decision-making in complex and uncertain space environments. We proudly have an "extreme ownership" oriented engineering culture. What You'll Do Scoping architecture for the perception system core to Lodestar's autonomy software suite Research and adapt novel perception algorithms - everything from lit. review, through training and evaluation, to optimisation and deployment Design, develop ML algorithms from the ground up, in addition to build on and optimizing our existing models for edge computing Further develop our robust methods for predicting relative pose of dynamic space targets in harsh and unpredictable visual environments Integrate perception models into mission simulation environments and real-time autonomy pipelines Contribute to the design of realistic sensor models and digital twins to improve perception fidelity in mission scenarios Own perception tooling, model training infrastructure, and evaluation frameworks for ongoing development and deployment Collaborate across autonomy, estimation, and mission software teams to ensure perception fidelity, performance, and scalability Basic Qualifications Bachelor's or Master's degree in, AI/ML, Computer Science, Robotics, a related field, or equivalent experience 2+ years of distinguished industry experience in Machine Learning, robotics, computer vision, or a related field Excellent software engineering skills in C++ and Python Strong DNN/ML background and experience in CV and image processing libraries (OpenCV, CUDA-accelerated vision, PCL) Broad understanding of modern perception systems and their architecture Experience developing and deploying ML models to real-time systems Preferred Skills & Experience Experience processing sensor measurements from a variety of sensors including RADAR, electro-optical sensors, RF sensors, or LIDAR Familiarity with image processing techniques (e.g., feature extraction, segmentation, filtering, stereo matching) to support 3D reconstruction and target classification Track record optimizing neural networks and geometric algorithms using CUDA kernels, TensorRT, or other GPU acceleration frameworks Experience with distributed training and cloud-based scaling of ML models (AWS, GCP, or Azure) Experience with Linux, Git, and CI/CD pipelines Comfortable with containerization tools such as Docker and Kubernetes Strong understanding of networking and communication protocols for distributed autonomy systems ITAR Requirements To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here. Compensation & Benefits Pay Range: (E1) Junior Software Engineer: $115,000 - $140,000 / year (E2) Software Engineer: $140,000 - $180,000 / year (E3) Senior Software Engineer: Competitive Meaningful equity incentives as part of our employee option pool Flexible PTO with generous paid vacation, holidays, and sick leave Comprehensive medical, dental & vision coverage 401(k) retirement plan with company match Los Angeles or San Francisco Additional Information Compensation bands are determined by role, level, location, and alignment with market data. Individual level and base pay is determined on a case-by-case basis and may vary based on job-related skills, education, experience, technical capabilities and internal equity. In addition to base salary, for full-time hires, you may also be eligible for long-term incentives, in the form of stock options , and access to medical, vision and dental coverage, as well as access to a 401(k) retirement plan. Lodestar is an Equal Opportunity Employer; employment with Lodestar is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.