Principal Engineer, CPU Architecture & Performance Research

🏢 Summary: Staff-level CPU Architecture & Performance Research Engineer role focused on analyzing and optimizing RISC-V CPU microarchitecture performance using architectural models, simulators, and workload analysis. The position involves collaboration with architecture, compiler, and system teams to identify bottlenecks, evaluate trade-offs, and improve next-generation CPU core performance. Candidates will work on performance-critical domains, contribute architectural recommendations, and support patent and publication work. 🗂️ Requirements: Master’s degree in Computer Engineering, Computer Science, or related field with 8+ years of experience or PhD with 5+ years of experience, 5+ years of CPU microarchitecture or performance engineering experience, Experience with RISC-V, ARM, or X86 architectures, Knowledge of out-of-order execution, branch prediction, pipelines, and speculation, Knowledge of cache coherence, memory systems, prefetching, and NUMA effects, Hands-on experience with architectural simulators, Strong C/C++ programming skills, Strong Python programming skills, Experience analyzing large performance datasets and traces, Familiarity with compiler optimizations and hardware/software co-design, Prior tapeout experience 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, NUMA, SIMD, VME 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. This opportunity focuses on next-generation CPU architecture and performance optimization. What You'll Do Architecture Research Lab is looking for a Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads. Responsibilities - Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem) - Build, extend, and validate architectural performance models and simulators - Perform CPI/IPC breakdowns and root-cause performance bottlenecks - Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models - Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces) - Translate performance data into clear architectural recommendations - Contribute to work leading to patents and publications What You Bring - Master’s degree in Computer Engineering, Computer Science, or related field with 8+ years of experience, or PhD with 5+ years of experience - 5+ years of experience in CPU microarchitecture and/or performance engineering - Experience with RISC-V, ARM, or X86 architectures - Strong understanding of: - Out-of-order execution, branch prediction, pipelines, and speculation - Cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators such as gem5 - Strong programming skills in C/C++ and Python - Experience analyzing large performance datasets and traces - Familiarity with compiler optimizations and hardware/software co-design - Proven prior tapeout experience Preferred Qualifications - Background in power/performance/area (PPA) trade-off analysis - Experience or familiarity with SIMD, vectors, or VME for AI inference workloads - Prior leadership experience guiding junior engineers - Prior patent or publication experience Benefits - Competitive compensation with incentive opportunities - Medical, Dental, Vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off, holidays, and sick leave - Fertility care, adoption support, medical travel support, and virtual vet care - Emotional wellness support including confidential therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment and wellness-focused benefits Base Pay Range: $163,000—$253,000 USD

🏢 Summary: Senior CPU Architecture & Performance Engineer role focused on performance analysis and microarchitectural optimization of current and next-generation RISC-V CPU cores. The position involves architectural simulation, bottleneck analysis, workload characterization, and automation of performance studies in collaboration with architecture and design teams. The role is onsite in San Jose and includes opportunities for patents and publications. 🗂️ Requirements: Master's or PhD in Computer Engineering, Computer Science, or related field, 2+ years of experience in CPU microarchitecture or performance engineering, Strong understanding of out-of-order execution, branch prediction, pipelines, and speculation, Strong understanding of cache coherence, memory systems, prefetching, and NUMA effects, Hands-on experience with architectural simulators, Strong programming skills in C/C++, Strong programming skills in Python, Experience analyzing large performance datasets and traces, Familiarity with compiler optimizations, Familiarity with hardware/software co-design 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, NUMA, SIMD, VME 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do Architecture Research Lab is seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads. You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains. - Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers. - Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics). - Identify performance bottlenecks in frontend, execution engine, or memory subsystems. - Assist in evaluating design trade-offs using trace-driven or cycle-accurate models. - Characterize workloads and benchmarks (SPEC, server, client, internal traces). - Develop scripts and tools to automate performance analysis. - Work leading to patents and publication. What You Bring - Master's, or PhD in Computer Engineering, Computer Science, or related field. - 2+ years of experience in CPU microarchitecture and/or performance engineering. - Strong understanding of: - Out-of-order execution, branch prediction, pipelines, and speculation - Cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators (like gem5). - Strong programming skills in C/C++ and Python. - Experience analyzing large performance datasets and traces. - Familiarity with compiler optimizations and hardware/software co-design. Preferred Qualifications - Experience with RISC-V, ARM or X86 architectures. - Background in power/performance/area (PPA) trade-off analysis. - Familiarity with SIMD / Vectors / VME for AI inference workloads. - Prior tapeout / patent / publication experience. - You're inclusive, adapting your style to the situation and diverse global norms of our people. - You approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Medical/Dental/Vision/401k benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand apps and free confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment - Base Pay Range: $138,000—$206,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies with a valid agreement may submit resumes for job openings. Applicant AI Use Policy Generative AI tools may not be used to misrepresent a candidate's skills or qualifications during the hiring process. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Principal-level role leading research, modeling, and optimization of next-generation RISC-V CPU microarchitectures with end-to-end performance focus from architectural exploration to silicon correlation. The position drives performance analysis, workload characterization, and cross-stack optimization in collaboration with architecture, design, compiler, and system teams. It includes technical leadership and influence on future core definitions through quantitative analysis. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science, or related field, 15+ years of experience with PhD or 18+ years with Master’s, 10+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM, or X86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines, speculation, Strong knowledge of cache coherence, memory systems, prefetching, NUMA, Experience with architectural simulators, Proficiency in C/C++ and Python, Experience with workload characterization and performance analysis, Experience influencing architectural decisions through quantitative analysis 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, SIMD, VME, SPEC, NUMA, RTL 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Principal, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation. You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42918 Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect). Lead performance analysis using simulators, RTL. Help develop and validate performance models (cycle-accurate, trace-driven, statistical). Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements. Identify performance bottlenecks and propose data-driven optimizations. Drive architecture-to-implementation alignment with design team. Collaborate with compiler, OS, and system architects on cross-stack performance issues. Mentor senior and staff engineers; provide technical leadership across projects. Work leading to patents and publication What You Bring Master's with 18+ years of experience in Computer Engineering, Computer Science, or related field. or PhD with 15+ years of experience preferred. 10+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Familiarity with compiler optimizations and hardware/software co-design. Familiarity with SIMD / Vectors / VME for AI inference workloads. Experience analyzing large performance datasets and traces. Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience with SIMD/Vectors. Experience with compiler optimizations and hardware/software co-design. Prior technical leadership at Senior Staff or Principal level. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Staff CPU Architecture & Performance Research Engineer role focused on deep microarchitectural performance analysis and optimization of current and next-generation RISC-V CPU cores. The position involves building performance models, analyzing real-world workloads, and driving data-driven architectural improvements in collaboration with cross-functional hardware and software teams. The work directly influences core design decisions and may lead to patents and publications. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science or related field, 5+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM or x86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines and speculation, Strong knowledge of cache coherence, memory systems, prefetching and NUMA, Hands-on experience with architectural simulators, Strong programming skills in C/C++ and Python, Experience analyzing large performance datasets and traces, Prior tapeout experience 📃 Skills: RISC-V, ARM, x86, gem5, C, C++, Python, SPEC, NUMA, SIMD 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Staff, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42850 Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem). Build, extend, and validate architectural performance models and simulators. Perform CPI/IPC breakdowns and root-cause performance bottlenecks. Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models. Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces). Translate performance data into clear architectural recommendations. Work leading to patents and publication. What You Bring Master's in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience. 5+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Experience analyzing large performance datasets and traces. Familiarity with compiler optimizations and hardware/software co-design.. Proven ability - prior tapeout experience. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads.. Prior leadership guiding junior engineers. Prior patent / publication experience. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Principal AI System Architect role focused on researching and designing next-generation AI hardware systems for large-scale workloads. The position involves leading architecture strategy, developing system-level performance models, and evaluating compute, memory, and interconnect architectures for AI scalability and efficiency. The role requires deep expertise in AI system architecture, simulation modeling, and large-scale AI workloads. 🗂️ Requirements: Ph.D. in Computer Science, Electrical Engineering, or related field preferred, 15+ years of experience in system architecture for large-scale computing platforms, Hands-on experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload characteristics into architectural design decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Modeling, Simulation, Architecture, Hardware, Networking, Memory, Interconnect 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. Responsibilities: - Technically lead the architecture team with strong direction, shaping system-architecture strategy and advancing key innovations - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections - Perform comparative studies of alternative system architectures and report performance and efficiency metrics - Collaborate with hardware architecture, memory, interconnect, and system engineering teams - Communicate architectural insights and recommendations through technical presentations and documentation - Occasional domestic and international travel under 10% What You Bring - Ph.D. in Computer Science, Electrical Engineering, or a related field preferred - 15+ years of experience in system architecture for large-scale computing platforms with a focus on AI workloads - Hands-on experience developing analytical and event-driven simulation models - Deep understanding of AI system hardware architectures including compute, memory hierarchies, and high-performance interconnects - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems - Ability to translate workload characteristics and modeling results into architectural design decisions - Proficiency in Python, C++, and PyTorch - Excellent written, verbal, and presentation communication skills - Collaborative mindset and resilience in solving complex system-level challenges What We Offer - Competitive compensation with incentive opportunities - Medical, Dental, Vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility and adoption support - Emotional wellness resources and therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for basic preparation, grammar, and research, but not for submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Senior Staff AI System Architect role focused on researching and designing next-generation AI systems for large-scale workloads. The position involves building system-level performance models, analyzing AI architectures, and driving design decisions across compute, memory, and networking subsystems. The role requires strong expertise in AI hardware architectures, simulation modeling, and AI workloads such as LLMs and DLRMs. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 5+ years of experience in system architecture for large-scale computing platforms, Experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload analysis into architectural decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Simulation, Modeling, Architecture, Networking, Memory, Compute 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging advanced memory technologies, the team explores and defines next-generation AI system architectures that deliver major improvements in performance, efficiency, and scalability. We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems. - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks. - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models. - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. - Perform comparative studies of alternative system architectures and report performance-per-watt metrics. - Collaborate with cross-functional teams in hardware architecture, memory, interconnect, and system engineering. - Communicate architectural insights and recommendations through technical presentations and documentation. - Occasional domestic and international travel under 10%. What You Bring - PhD in Computer Science, Electrical Engineering, or a related field. - 5+ years of experience in system architecture for large-scale computing platforms focused on AI workloads. - Hands-on experience developing analytical and event-driven simulation models. - Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems. - Ability to translate workload characteristics and modeling results into actionable architectural decisions. - Proficiency in Python, C++, and PyTorch. - Excellent written, verbal, and presentation communication skills. - Collaborative mindset and ability to tackle complex system-level challenges. What We Offer - Competitive base pay range of $163,000–$253,000 USD. - Incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - 4+ weeks of paid time off plus holidays and sick leave. - Support for fertility care, adoption, medical travel, and virtual pet care. - Emotional wellness support including therapy sessions and wellness apps. - Onsite café, gym, and virtual fitness classes. - Flexible work environment and community giving opportunities. Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates with disabilities or other support needs. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but hiring decisions are made by human recruiting teams and hiring managers. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Principal Engineer role focused on AI system architecture research and technical leadership for next-generation AI hardware platforms. The position involves developing system-level performance models, evaluating AI workloads, and driving architecture decisions across compute, memory, and interconnect systems. Daily onsite work in San Jose with collaboration across hardware and system engineering teams. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 15+ years of experience in AI system architecture for large-scale computing platforms, Hands-on experience with analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload modeling into architectural decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLMs, DLRMs, Modeling, Simulation, Architecture, Hardware, Memory, Interconnect, Networking 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape long-term AI platform strategy. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Technically lead the architecture team with strong direction, shaping system-architecture strategy and advancing key innovations - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale - Analyze representative and emerging system-level architectural research including LLMs, DLRMs, and future AI models to derive architecture requirements and trade-offs across compute, memory, networking, and power - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections - Perform comparative studies of alternative system architectures and report performance and performance-per-watt metrics - Collaborate with cross-functional teams in hardware architecture, memory, interconnect, and system engineering - Communicate architectural insights and recommendations through technical presentations and documentation - Occasional domestic and international travel under 10% What You Bring - PhD in Computer Science, Electrical Engineering, or a related field preferred - 15+ years of experience in system architecture for large-scale computing platforms with a strong focus on AI workloads - Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation - Deep understanding of AI system hardware architectures including compute, memory hierarchies, and high-performance interconnects - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems - Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions - Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation - Excellent written, verbal, and presentation communication skills - Collaborative mindset, intellectual curiosity, and resilience in tackling complex system-level challenges What We Offer The pay range varies by work location and depends on job-related knowledge, skills, and experience. Incentive opportunities are offered in addition to benefits. Benefits include: - Medical, Dental, Vision, and 401k plans - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand wellness apps and confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers. Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Principal AI Serving Framework Architect role focused on designing and optimizing large-scale AI inference systems, memory-centric architectures, and AI serving frameworks for multi-rack environments. The position involves leading research initiatives, developing performance optimization strategies, and contributing to AI infrastructure design using technologies such as vLLM, PyTorch, Python, and C++. 🗂️ Requirements: PhD in Computer Science or related field, 10+ years of experience in AI Serving Frameworks for large-scale computing, Experience leading LLM inference software stack projects at multi-rack scale, Experience delivering AI inference services for 100,000+ users, Expertise in AI inference software stacks for heterogeneous devices, Deep understanding of inference engines such as vLLM, Experience in AI inference system profiling and optimization, Knowledge of reasoning models, multimodal AI, AI agents, and world models, Strong understanding of compute, memory, and networking bottlenecks in AI systems, Proficiency in PyTorch, Proficiency in Python, Proficiency in C++, Excellent verbal and written communication skills 📃 Skills: PyTorch, Python, C++, vLLM, LLM, RAG, SSD, KVCache, AI, Inference 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Job Title: Principal engineer, AI Serving Framework Architect (Software) The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging world-class memory technologies, the lab explores and defines next-generation AI system architectures that deliver improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Lead research teams and propose technical direction - Research dynamic scheduling methodologies for maximizing AI inference performance in multi-rack scale memory-centric systems - Investigate methods to accelerate search operations in RAG vector databases and AI agent knowledge graphs using compute-capable memory - Study strategies for optimally placing KVCache and vector databases in hierarchical memory to minimize SSD access and reduce IO stalls - Propose software designs for implementing optimization algorithms on open-source platforms such as vLLM What You Bring - PhD in Computer Science or related field with 10+ years of experience in AI Serving Frameworks for large-scale computing - Experience leading projects to build and optimize LLM inference software stacks on multi-rack scale systems serving over 100,000 users - Extensive experience designing AI inference software stacks for heterogeneous devices - In-depth understanding of inference engines such as vLLM - Proficiency in AI inference system profiling and optimization - Knowledge of future AI workloads including reasoning models, multimodal solutions, AI agents, and world models - Strong understanding of compute, memory, and networking bottlenecks in AI systems - Required skills: PyTorch, Python, and C++ - Collaborative mindset and strong communication skills - Native or fluent Korean is preferred What We Offer - Competitive compensation with incentive opportunities - Medical, Dental, Vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off, holidays, and sick leave - Family support benefits including fertility, adoption, and medical travel assistance - Emotional wellness support and confidential therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace where all individuals are valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used as support tools during recruitment, but all hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation and research but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Principal Engineer role focused on leading AI system architecture research and driving system-level design decisions for next-generation AI platforms. The position centers on modeling, evaluating, and optimizing compute, memory, and interconnect subsystems to improve performance, scalability, and efficiency of large-scale AI workloads. The role bridges AI workloads, hardware architecture, and quantitative system modeling to shape long-term AI infrastructure strategy. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 15+ years of experience in system architecture for large-scale computing platforms, Hands-on experience with analytical and event-driven system-level performance modeling, Deep understanding of AI hardware architectures including compute, memory hierarchies, and interconnects, Strong knowledge of modern AI workloads such as LLMs and DLRMs, Experience translating workload analysis into architectural design decisions, Proficiency in Python, C++, and PyTorch, Ability to work onsite in San Jose 📃 Skills: Python, C++, PyTorch, AI, LLMs, DLRMs, Modeling, Simulation, Architecture, Hardware, Compute, Memory, Interconnects, Networking, Performance, Scalability, Power 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Job Title: Principal Engineer, AI System Architect (Hardware) The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung's long-term AI platform strategy. Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42852 What You'll Do Technically Lead the architecture team with strong direction, shaping system‑architecture strategy and advancing key innovations Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems. Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. Analyze representative and emerging system-level architectural research (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power. Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities. Communicate architectural insights and recommendations through clear technical presentations and documentation. Occasional domestic and international travel (<10%). What You Bring Ph.D. in Computer Science, Electrical Engineering, or a related field preferred, with 15+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems. Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions. Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams. A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Long-term B2B contract for a hands-on Principal Software Architect / Tech Lead to lead the architecture and scaling of a production AI-driven decision platform for advanced legal data analysis on GCP. The role focuses on end-to-end system design, backend refactoring, AI/LLM orchestration, and building high-performance, scalable APIs in Python/FastAPI. Strong emphasis on cloud-native architecture, asynchronous processing, and engineering best practices. 🗂️ Requirements: Minimum 8 years of commercial software engineering experience, Proven experience as Architect or Tech Lead in complex distributed systems, Expert-level Python knowledge, Expert-level FastAPI knowledge, Practical experience with asynchronous programming, Hands-on experience with Google Cloud Platform, Experience designing and scaling high-performance APIs, Production experience with LLM integration and AI systems, Experience working with large datasets, Ability to design end-to-end system architecture 📃 Skills: Python, FastAPI, GCP, LLM, LangChain, LlamaIndex, Neo4j, Pinecone, Qdrant, Weaviate, Kafka, RabbitMQ, PubSub, Docker, Kubernetes 🏢 Description: Principal Software Architect / Tech Lead (Python · FastAPI · GCP) Firma: ARX Consilium / OC-ARX Tryb pracy: 100% zdalnie (PL/EU) Forma współpracy: B2B / kontrakt długofalowy Wynagrodzenie: 30 000–40 000 PLN netto + opcjonalny pakiet udziałów (equity) O projekcie Budujemy platformę klasy AI-driven decision platform do zaawansowanej analizy danych prawnych i wspierania procesów decyzyjnych. To nie kolejny prosty SaaS ani generyczne MVP — system działa już produkcyjnie. Rosnąca złożoność (podejścia grafowe, orkiestracja LLM, analityka real-time) wymaga jednak wejścia na wyższy poziom architektoniczny. Szukamy lidera technicznego, który przejmie ster nad stroną technologiczną aplikacji, uporządkuje istniejące rozwiązania i przygotuje platformę pod globalne skalowanie. Zakres odpowiedzialności Projektowanie i rozwój architektury systemu end-to-end, ze szczególnym naciskiem na wydajność, asynchroniczność i bezpieczeństwo. Rola hands-on architect / tech lead — podejmowanie kluczowych decyzji technologicznych, projektowanie API oraz samodzielne wdrażanie krytycznych elementów systemu (proof of concept, core refactor). Refaktoryzacja i skalowanie istniejącego backendu pod kątem modularności, pracy wielu użytkowników jednocześnie oraz stabilnych środowisk test/prod. Orkiestracja warstwy AI — praca z mechanizmami LLM, systemami agentowymi i bazami wektorowymi, z dbałością o niskie opóźnienia, streaming danych i optymalne zarządzanie kontekstem. Wdrażanie najwyższych standardów inżynierskich: automatyzacja release’ów, CI/CD, testy (jednostkowe, integracyjne, obciążeniowe) oraz kultura code review. Wymagania (must-have) Minimum 8 lat komercyjnego doświadczenia w inżynierii oprogramowania, w tym udokumentowana rola architekta lub tech leada w złożonych systemach rozproszonych. Ekspercka znajomość Pythona oraz frameworka FastAPI (programowanie asynchroniczne, optymalizacja zapytań, budowa wysokowydajnych API). Głębokie, praktyczne doświadczenie z Google Cloud Platform (GCP) — warunek konieczny. Rozumienie specyfiki systemów AI-driven: produkcyjne wdrażanie LLM, integracja z modelami AI, praca na dużych zbiorach danych. Myślenie analityczne, umiejętność mapowania złożonych procesów biznesowych na architekturę techniczną oraz jasnego uzasadniania decyzji. Mile widziane Bazy grafowe (np. Neo4j) i systemy reprezentacji wiedzy (Knowledge Graphs) Bazy wektorowe (Vector DBs — np. Pinecone, Qdrant, Weaviate) Narzędzia do orkiestracji AI/LLM (np. LangChain, LlamaIndex) Architektura event-driven oraz systemy kolejkowe (Kafka, RabbitMQ, Pub/Sub) Konteneryzacja i orkiestracja (Docker, Kubernetes) Doświadczenie w domenach o wysokiej odpowiedzialności biznesowo-prawnej ( FinTech, LegalTech, MedTech ) wymagających audytowalności decyzji Kogo NIE szukamy Architektów „gabinetowych” — szukamy lidera, który nie boi się ubrudzić rąk kodem i potrafi sam zrobić core’owy refaktor, a nie tylko rysować diagramy w Miro. „Seniorów” skupionych wyłącznie na przepychaniu tasków z Jiry. Osób bez silnego, praktycznego doświadczenia z chmurą publiczną (GCP) i systemami produkcyjnymi o dużym natężeniu ruchu. Co oferujemy Realny, decydujący wpływ na architekturę i kierunek rozwoju zaawansowanej platformy. Brak korporacyjnego betonu, płaska struktura i szybkie procesy decyzyjne. Wyzwania techniczne, przy których się nie znudzisz (grafy, AI, asynchroniczność, wysoka skala). Długofalową, stabilną współpracę opartą na partnerstwie i zaufaniu. Proces rekrutacji Krótka kawa online (15–20 min) — poznajmy się i sprawdźmy, czy nadajemy na tych samych falach. Rozmowa techniczna (system design, FastAPI, GCP, architektura) — konkretna dyskusja inżynier z inżynierem, bez algorytmów rodem z kosmosu. Decyzja i oferta.