April 9, 2026
Senior Embedded Software Engineer
Senior • Remote
Gliwice, Poland
Szukamy inżyniera, dla którego warstwa HAL to dopiero początek zabawy. Jeśli architektura multi-core SoC, projektowanie systemów niskomocowych (ultra-low power) i mechanizmy IPC to Twoja codzienność – mamy dla Ciebie projekt, który przesuwa granice technologii.
Będziesz pracować nad nową generacją architektury, tworząc fundamenty dla rdzeni Application, Protocol i Radio.
Oferujemy
Praca 100 % zdalna.
Obowiązki
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Hardware Bring-up: Rozwój warstwy HAL i niskopoziomowych sterowników C dla nowoczesnych układów SoC.
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Inter-Processor Communication (IPC): Projektowanie driverów typu "mailbox" do orkiestracji danych między wieloma rdzeniami.
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Power Management: Implementacja zaawansowanych maszyn stanów (clock gating, supply assignments) dla minimalizacji zużycia energii.
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Ecosystem Ready: Tworzenie BSP (Board Support Packages) oraz definicji Devicetree dla systemów Zephyr i FreeRTOS.
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Pre-silicon development: Praca na platformach emulacyjnych FPGA i w środowiskach symulacji RTL.
Wymagania
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5+ lat doświadczenia w embedded (niskopoziomowe drivery, HAL).
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Głęboka wiedza o architekturze ARM Cortex-M i szeregowaniu zasobów multi-core.
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Biegłość w C dla systemów Zephyr i FreeRTOS.
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Praktyka w mechanizmach IPC (mailboxes, spinlocks, shared memory).
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Doświadczenie w zarządzaniu energią (sleep modes, wake-up sources).
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Język angielski na poziomie swobodnej komunikacji technicznej.
✨ Mile widziane:
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Integracja z warstwą CMSIS.
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Doświadczenie w budowaniu publicznych SDK.
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Znajomość systemów budowania CMake/Kconfig.
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What You Bring - Master's, or PhD in Computer Engineering, Computer Science, or related field. - 2+ years of experience in CPU microarchitecture and/or performance engineering. - Strong understanding of: - Out-of-order execution, branch prediction, pipelines, and speculation - Cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators (like gem5). - Strong programming skills in C/C++ and Python. - Experience analyzing large performance datasets and traces. - Familiarity with compiler optimizations and hardware/software co-design. Preferred Qualifications - Experience with RISC-V, ARM or X86 architectures. - Background in power/performance/area (PPA) trade-off analysis. - Familiarity with SIMD / Vectors / VME for AI inference workloads. - Prior tapeout / patent / publication experience. - You're inclusive, adapting your style to the situation and diverse global norms of our people. - You approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Medical/Dental/Vision/401k benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand apps and free confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment - Base Pay Range: $138,000—$206,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies with a valid agreement may submit resumes for job openings. Applicant AI Use Policy Generative AI tools may not be used to misrepresent a candidate's skills or qualifications during the hiring process. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.
Technology

Samsung
Staff Engineer, Serdes Analog Design
Senior
On-site
San Jose, CA
🏢 Summary: Senior onsite analog/mixed-signal IC design role focused on high-speed SerDes transceiver architecture and circuit development for next-generation interconnect technologies. The position involves designing, simulating, validating, and optimizing low-power analog and custom digital circuits using advanced CMOS processes and EDA tools. 🗂️ Requirements: Bachelor's degree with 10+ years, Master's degree with 8+ years, or PhD with 5+ years of relevant experience, 2+ years of RF/Analog/SerDes SoC design experience, Experience with analog and mixed-signal circuits, Knowledge of SerDes IP circuits including CTLE, DFE, FFE, clock distribution, PI, and IQ generation, Knowledge of SerDes architecture and high-speed interconnect standards, Experience with EDA tools, Experience with scripting languages such as Python or Matlab, Ability to design, simulate, validate, and optimize analog/custom digital circuits 📃 Skills: CMOS, SerDes, RF, Analog, Mixed-signal, CTLE, DFE, FFE, PLL, ADC, DAC, ESD, Cadence, Spectre, Totem, EMX, Python, Matlab, USB, PCIe, UCIe, Ethernet, LDO 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world's technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. What You'll Do In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver (Serdes). You will work on circuits for Serdes IPs, clock generation as well as traditional analog circuits. You'll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies. Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability. Supervise layout designers to generate LVS/DRC clean layout. Optimize layout to improve the power consumption and performance of circuits. Functionality and performance validation in Silicon. What You Bring - Bachelors with 10+ years, Masters with 8+ years or PhDs with 5+ years of experience. - Minimum 2+ yrs experience RF/Analog/Serdes SoC design experience. - Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters. - Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. - Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe). - Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus. - Well-versed in EDA tools (Cadence, Spectre, Totem, EMX). - Comfortable with scripting languages (Python, Matlab). - You're inclusive, adapting your style to the situation and diverse global norms of our people. - An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to Medical/Dental/Vision/401k, the rewards plan includes: - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Fertility care or adoption stipend, medical travel support, and virtual vet care. - On-demand wellness apps and free confidential therapy sessions. - Onsite café and gym, plus virtual fitness classes. - Flexible work environment and work-life balance support. Base Pay Range: $157,000—$243,000 USD. Equal Opportunity Employment Policy Samsung Semiconductor is dedicated to fostering an inclusive environment where individuals are valued regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Comprehensive accommodations are available throughout the recruiting process for candidates with disabilities, long-term conditions, neurodivergence, or pregnancy-related support. Our Commitment to Innovation and Fairness AI tools may be used in recruitment to support efficiency, but hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.
Technology
Startup House
Mid DevOps Engineer
Mid
Remote
Warsaw, Poland
90 - 120 PLN
🏢 Summary: The offer is for a Mid DevOps Engineer responsible for designing and maintaining scalable cloud environments, ensuring infrastructure security, reliability, and performance. The role focuses on Infrastructure as Code, CI/CD automation, monitoring, and supporting development teams in building production-grade systems. You will work on modern cloud-native projects with real impact on architecture and technology decisions. 🗂️ Requirements: Minimum 2 years experience as DevOps Engineer or similar role, Strong knowledge of Kubernetes, Strong knowledge of Docker, Experience with cloud platforms (GCP or AWS or Azure), Good knowledge of Linux (Debian or Ubuntu or CentOS), Experience with Infrastructure as Code tools (Terraform or Helm or Kustomize or Ansible), Practical experience with CI/CD processes, Knowledge of infrastructure and network security, Knowledge of PostgreSQL or MySQL, Experience with monitoring and observability tools (Prometheus or Victoria or Grafana), Experience managing production environments, autoscaling and backups, English proficiency at minimum B2 level 📃 Skills: Kubernetes, Docker, GCP, AWS, Azure, Linux, Debian, Ubuntu, CentOS, Terraform, Helm, Kustomize, Ansible, CI/CD, PostgreSQL, MySQL, Prometheus, Victoria, Grafana 🏢 Description: O nas W SH budujemy systemy produkcyjne, w których AI jest częścią architektury , a nie dodatkiem do roadmapy. Pracujemy nad skalowalnymi produktami dla ambitnych przedsiębiorstw i globalnych firm, od greenfieldów po złożone platformy analityczne. Interesują nas realne problemy inżynierskie: dane, skala, niezawodność, ewolucja systemów i sensowne użycie AI w produkcie. Od 2016 roku współpracowaliśmy z ponad 100 organizacjami na pięciu kontynentach, w tym z markami takimi jak Siemens, Toyota czy Rainbow Tours. Twoja rola Jako Mid DevOps Engineer będziesz: projektować i rozwijać skalowalne środowiska chmurowe dla projektów klientów, odpowiadać za bezpieczeństwo, utrzymanie i niezawodność infrastruktury, rozwijać i utrzymywać rozwiązania Infrastructure as Code, projektować oraz usprawniać procesy CI/CD, wdrażać i rozwijać systemy monitoringu, alertowania oraz analizy wydajności i stanu infrastruktury, wspierać zespoły developerskie w zakresie architektury i najlepszych praktyk DevOps, automatyzować procesy wdrożeniowe oraz operacyjne, optymalizować koszty infrastruktury oraz wykorzystania zasobów chmurowych, diagnozować i rozwiązywać problemy wpływające na dostępność oraz wydajność systemów, aktywnie uczestniczyć w podejmowaniu decyzji technologicznych i architektonicznych. Wymagania Minimum 2 lata doświadczenia na stanowisku DevOps Engineer lub podobnym, Bardzo dobra znajomość Kubernetes oraz Docker, Doświadczenie w pracy z platformami chmurowymi (GCP, AWS lub Azure), Dobra znajomość systemów Linux (Debian, Ubuntu, CentOS), Doświadczenie w automatyzacji infrastruktury z wykorzystaniem Terraform, Helm, Kustomize lub Ansible, Praktyczna znajomość procesów CI/CD, Wiedza z zakresu bezpieczeństwa infrastruktury oraz sieci komputerowych, Znajomość baz danych PostgreSQL lub MySQL, Znajomość narzędzi monitoringu i observability, takich jak Prometheus, Victoria oraz Grafana, Doświadczenie w zarządzaniu środowiskami produkcyjnymi, autoscalingiem, backupami,Swobodna komunikacja w języku angielskim (min. B2). Mile widziane Doświadczenie z GitHub Actions, CircleCI lub Jenkins, Doświadczenie w pracy z Redis, Doświadczenie w pracy ze firmami typu enterprise i scale-up, Doświadczenie w wykorzystaniu AI do automatyzacji procesów i zwiększania wydajności pracy, Pasja do nowych technologii. Nasza oferta Współpraca B2B, Praca w modelu zdalnym z możliwością korzystania z biura w Warszawie, Elastyczne godziny pracy, Prywatna opieka medyczna, Karta Multisport, Sprzęt do pracy (MacBook), Możliwość pracy przy projektach dla klientów z różnych branż i rynków międzynarodowych. Dlaczego warto? Jeśli chcesz: Projektować i rozwijać nowoczesne środowiska chmurowe dla innowacyjnych produktów, Mieć realny wpływ na architekturę i kierunek rozwoju projektów, Pracować z nowoczesnym stackiem technologicznym i doświadczonym zespołem, Rozwijać swoje kompetencje w projektach dla szybko rozwijających się firm i globalnych organizacji… …to to ogłoszenie jest dla Ciebie.