Staff, CPU Architecture & Performance Research Engineer

🏢 Summary: Staff CPU Architecture & Performance Research Engineer role focused on deep microarchitectural performance analysis and optimization of current and next-generation RISC-V CPU cores. The position involves building performance models, analyzing real-world workloads, and driving data-driven architectural improvements in collaboration with cross-functional hardware and software teams. The work directly influences core design decisions and may lead to patents and publications. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science or related field, 5+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM or x86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines and speculation, Strong knowledge of cache coherence, memory systems, prefetching and NUMA, Hands-on experience with architectural simulators, Strong programming skills in C/C++ and Python, Experience analyzing large performance datasets and traces, Prior tapeout experience 📃 Skills: RISC-V, ARM, x86, gem5, C, C++, Python, SPEC, NUMA, SIMD 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Staff, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42850 Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem). Build, extend, and validate architectural performance models and simulators. Perform CPI/IPC breakdowns and root-cause performance bottlenecks. Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models. Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces). Translate performance data into clear architectural recommendations. Work leading to patents and publication. What You Bring Master's in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience. 5+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Experience analyzing large performance datasets and traces. Familiarity with compiler optimizations and hardware/software co-design.. Proven ability - prior tapeout experience. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads.. Prior leadership guiding junior engineers. Prior patent / publication experience. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior CPU Architecture & Performance Engineer role focused on performance analysis and microarchitectural optimization of current and next-generation RISC-V CPU cores. The position involves architectural simulation, bottleneck analysis, workload characterization, and automation of performance studies in collaboration with architecture and design teams. The role is onsite in San Jose and includes opportunities for patents and publications. 🗂️ Requirements: Master's or PhD in Computer Engineering, Computer Science, or related field, 2+ years of experience in CPU microarchitecture or performance engineering, Strong understanding of out-of-order execution, branch prediction, pipelines, and speculation, Strong understanding of cache coherence, memory systems, prefetching, and NUMA effects, Hands-on experience with architectural simulators, Strong programming skills in C/C++, Strong programming skills in Python, Experience analyzing large performance datasets and traces, Familiarity with compiler optimizations, Familiarity with hardware/software co-design 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, NUMA, SIMD, VME 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do Architecture Research Lab is seeking Senior CPU Architecture & Performance Engineer to contribute to performance analysis and microarchitectural optimization of current and next-generation CPU (RISC-V) cores. This role emphasizes hands-on analysis, modeling, and close collaboration with architects and design teams to improve performance across real-world workloads. You will focus on executing well-defined performance studies, identifying bottlenecks, and helping translate architectural ideas into measurable performance gains. - Perform performance analysis for CPU microarchitectural features under guidance from Staff and Principal engineers. - Run architectural simulations and analyze results (IPC, CPI stacks, latency and throughput metrics). - Identify performance bottlenecks in frontend, execution engine, or memory subsystems. - Assist in evaluating design trade-offs using trace-driven or cycle-accurate models. - Characterize workloads and benchmarks (SPEC, server, client, internal traces). - Develop scripts and tools to automate performance analysis. - Work leading to patents and publication. What You Bring - Master's, or PhD in Computer Engineering, Computer Science, or related field. - 2+ years of experience in CPU microarchitecture and/or performance engineering. - Strong understanding of: - Out-of-order execution, branch prediction, pipelines, and speculation - Cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators (like gem5). - Strong programming skills in C/C++ and Python. - Experience analyzing large performance datasets and traces. - Familiarity with compiler optimizations and hardware/software co-design. Preferred Qualifications - Experience with RISC-V, ARM or X86 architectures. - Background in power/performance/area (PPA) trade-off analysis. - Familiarity with SIMD / Vectors / VME for AI inference workloads. - Prior tapeout / patent / publication experience. - You're inclusive, adapting your style to the situation and diverse global norms of our people. - You approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. - Innovative and creative, you proactively explore new ideas and adapt quickly to change. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Medical/Dental/Vision/401k benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand apps and free confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment - Base Pay Range: $138,000—$206,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies with a valid agreement may submit resumes for job openings. Applicant AI Use Policy Generative AI tools may not be used to misrepresent a candidate's skills or qualifications during the hiring process. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Principal-level role focused on researching and optimizing next-generation CPU microarchitectures, including RISC-V cores, through performance analysis, simulation, and workload characterization. The position involves cross-functional collaboration with architecture, compiler, OS, and design teams to improve system performance and efficiency across real-world workloads. Candidates will lead technical initiatives, mentor engineers, and contribute to patents and publications. 🗂️ Requirements: Master’s degree with 18+ years in Computer Engineering, Computer Science, or related field, or PhD with 15+ years, 10+ years of CPU microarchitecture or performance engineering experience, Experience with RISC-V, ARM, or X86 architectures, Knowledge of out-of-order execution, branch prediction, pipelines, and speculation, Knowledge of cache coherence, memory systems, prefetching, and NUMA, Experience with architectural simulators, Programming skills in C/C++ and Python, Experience with compiler optimizations and hardware/software co-design, Experience analyzing large performance datasets and traces, Ability to influence architecture decisions through quantitative analysis 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, SIMD, VME, NUMA, RTL, SPEC 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. This opportunity offers the chance to contribute to next-generation CPU technologies and performance optimization. What You'll Do Architecture Research Lab is seeking a Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role focuses on end-to-end performance, including architectural trade-offs, workload characterization, micro-architectural modeling, simulation, and silicon bring-up correlation. You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. Responsibilities - Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect) - Lead performance analysis using simulators and RTL - Help develop and validate performance models (cycle-accurate, trace-driven, statistical) - Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements - Identify performance bottlenecks and propose data-driven optimizations - Drive architecture-to-implementation alignment with design team - Collaborate with compiler, OS, and system architects on cross-stack performance issues - Mentor senior and staff engineers and provide technical leadership across projects - Contribute to patents and publications What You Bring - Master’s degree with 18+ years of experience in Computer Engineering, Computer Science, or related field, or PhD with 15+ years preferred - 10+ years of experience in CPU microarchitecture and/or performance engineering - Experience with RISC-V, ARM, or X86 architectures - Strong understanding of out-of-order execution, branch prediction, pipelines, speculation, cache coherence, memory systems, prefetching, and NUMA effects - Hands-on experience with architectural simulators such as gem5 - Strong programming skills in C/C++ and Python - Familiarity with compiler optimizations and hardware/software co-design - Familiarity with SIMD, vectors, and VME for AI inference workloads - Experience analyzing large performance datasets and traces - Proven ability through tapeouts, patents, or publications to influence architecture and microarchitectural decisions through quantitative analysis Preferred Qualifications - Background in power/performance/area (PPA) trade-off analysis - Experience with SIMD and vector technologies - Prior technical leadership at Senior Staff or Principal level Benefits - Competitive compensation and incentive opportunities - Medical, dental, vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility, adoption, and medical travel support - Emotional wellness support including therapy sessions and wellness apps - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range: $219,000—$351,000 USD

🏢 Summary: Principal-level role leading research, modeling, and optimization of next-generation RISC-V CPU microarchitectures with end-to-end performance focus from architectural exploration to silicon correlation. The position drives performance analysis, workload characterization, and cross-stack optimization in collaboration with architecture, design, compiler, and system teams. It includes technical leadership and influence on future core definitions through quantitative analysis. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science, or related field, 15+ years of experience with PhD or 18+ years with Master’s, 10+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM, or X86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines, speculation, Strong knowledge of cache coherence, memory systems, prefetching, NUMA, Experience with architectural simulators, Proficiency in C/C++ and Python, Experience with workload characterization and performance analysis, Experience influencing architectural decisions through quantitative analysis 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, SIMD, VME, SPEC, NUMA, RTL 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Principal, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation. You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42918 Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect). Lead performance analysis using simulators, RTL. Help develop and validate performance models (cycle-accurate, trace-driven, statistical). Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements. Identify performance bottlenecks and propose data-driven optimizations. Drive architecture-to-implementation alignment with design team. Collaborate with compiler, OS, and system architects on cross-stack performance issues. Mentor senior and staff engineers; provide technical leadership across projects. Work leading to patents and publication What You Bring Master's with 18+ years of experience in Computer Engineering, Computer Science, or related field. or PhD with 15+ years of experience preferred. 10+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Familiarity with compiler optimizations and hardware/software co-design. Familiarity with SIMD / Vectors / VME for AI inference workloads. Experience analyzing large performance datasets and traces. Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience with SIMD/Vectors. Experience with compiler optimizations and hardware/software co-design. Prior technical leadership at Senior Staff or Principal level. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Lead research and architecture design for next-generation AI systems, focusing on rack-scale co-design of AI workloads, memory, interconnects, and high-performance RISC-V CPUs. The role drives system-level modeling, simulation, and micro-architecture innovation to eliminate memory and bandwidth bottlenecks in large-scale AI platforms. It combines deep technical leadership with hands-on architecture research and cross-functional collaboration. 🗂️ Requirements: Ph.D. in Computer Science, Electrical Engineering, or related field, 10+ years in system-level architecture research or large-scale computing platform design, Expertise in AI workload-focused system architecture design, Strong experience in performance modeling and event-driven simulation, Deep knowledge of RISC-V, ARM, or x86 CPU architectures, Experience designing out-of-order CPU micro-architectures, Proficiency in transaction-level modeling (TLM), Experience with large-scale design-space exploration and PPA analysis, Hands-on programming experience in Python and C++, Ability to lead technical research teams and define architecture roadmaps 📃 Skills: RISC-V, ARM, x86, TLM, Python, C++, PPA, Simulation, Modeling, Microarchitecture 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do Lead cutting‑edge research on next‑generation AI system architectures. The role is responsible for end‑to‑end co‑design of AI workloads, system‑level modeling, hardware platforms, and high‑performance processors that leverage Samsung's advanced memory technologies to eliminate capacity, bandwidth, and large‑scale communication bottlenecks. Location: Daily onsite presence at our San Jose Headquarters in alignment with our Flexible Work policy AI System Architecture Leadership Define system‑level architectures that solve memory‑capacity, bandwidth, and interconnect challenges for large AI workloads (e.g., large language models, recommendation systems). Build and maintain analytical and event‑driven simulation frameworks for compute‑memory‑network performance at rack scale. Conduct design‑space exploration and quantitative trade‑off studies (performance, power, cost) to guide architecture decisions. Partner with SAIT HQ teams to align modeling insights with real‑world AI system implementations. RISC‑V CPU Architecture Leadership Architect high‑performance, out‑of‑order RISC‑V CPU cores that serve as host processors for AI computing systems. Drive IPC‑focused feature path‑finding; lead micro‑architecture research through performance‑model simulation and workload analysis. Produce detailed micro‑architecture specifications and guide cache/memory hierarchy design for optimal AI workload execution. Research & Innovation Management Lead a multidisciplinary research team, set technical roadmaps, and ensure delivery of high‑impact publications. Present architectural insights and strategic recommendations to senior leadership and external partners. What You Bring Education: Ph.D. in Computer Science, Electrical Engineering, or a related field. Experience: 10+years in system‑level architecture research or large‑scale computing platform design, with a strong focus on AI workloads. Technical Expertise: Performance modeling, event‑driven simulation, and quantitative analysis of compute‑memory‑interconnect systems. Deep knowledge of modern CPU/accelerator architectures (RISC‑V, ARM, x86) and heterogeneous integration. Proven ability to design rack‑scale AI system architectures that address memory, bandwidth, and interconnect constraints. Proficiency with transaction‑level modeling (TLM) and event‑driven simulation for compute‑memory‑network co‑design. Experience in large‑scale design‑space exploration and PPA (performance, power, area/cost) trade‑off analysis. Expertise in architecture and micro‑architecture design of out‑of‑order CPUs. Hands‑on experience with simulation tools and programming languages such as Python and C++. Communication Skills: Excellent written and verbal communication; proven ability to deliver technical presentations to senior stakeholders. Preferred Experience Proven track record of publishing high‑impact research papers. Experience influencing product roadmaps through architectural recommendations. Strong collaborative history with cross‑functional teams (hardware, software, memory technology). You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$246,000—$430,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Our Commitment to Innovation and Fairness At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we ask that candidates rely on their own knowledge and skills throughout the process. AI tools may be used for basic preparation, grammar, and research, but should not be used to generate or assist with submitted content or live interview responses. If we determine that AI is being used outside these guidelines, we reserve the right to pause or end the interview, and your candidacy may be disqualified. Trade Secret Notice By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior Staff AI System Architect role focused on researching and designing next-generation AI systems for large-scale workloads. The position involves building system-level performance models, analyzing AI architectures, and driving design decisions across compute, memory, and networking subsystems. The role requires strong expertise in AI hardware architectures, simulation modeling, and AI workloads such as LLMs and DLRMs. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 5+ years of experience in system architecture for large-scale computing platforms, Experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload analysis into architectural decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Simulation, Modeling, Architecture, Networking, Memory, Compute 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging advanced memory technologies, the team explores and defines next-generation AI system architectures that deliver major improvements in performance, efficiency, and scalability. We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems. - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks. - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models. - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. - Perform comparative studies of alternative system architectures and report performance-per-watt metrics. - Collaborate with cross-functional teams in hardware architecture, memory, interconnect, and system engineering. - Communicate architectural insights and recommendations through technical presentations and documentation. - Occasional domestic and international travel under 10%. What You Bring - PhD in Computer Science, Electrical Engineering, or a related field. - 5+ years of experience in system architecture for large-scale computing platforms focused on AI workloads. - Hands-on experience developing analytical and event-driven simulation models. - Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems. - Ability to translate workload characteristics and modeling results into actionable architectural decisions. - Proficiency in Python, C++, and PyTorch. - Excellent written, verbal, and presentation communication skills. - Collaborative mindset and ability to tackle complex system-level challenges. What We Offer - Competitive base pay range of $163,000–$253,000 USD. - Incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - 4+ weeks of paid time off plus holidays and sick leave. - Support for fertility care, adoption, medical travel, and virtual pet care. - Emotional wellness support including therapy sessions and wellness apps. - Onsite café, gym, and virtual fitness classes. - Flexible work environment and community giving opportunities. Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates with disabilities or other support needs. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but hiring decisions are made by human recruiting teams and hiring managers. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Senior Staff AI System Architect role focused on researching and defining next-generation AI hardware system architectures to overcome memory, bandwidth, and interconnect bottlenecks. The position involves building system-level performance models, analyzing large-scale AI workloads, and driving architecture decisions for scalable, high-performance AI platforms. The role bridges AI workloads, hardware architecture, and system modeling to shape long-term AI platform strategy. 🗂️ Requirements: Ph.D. in Computer Science, Electrical Engineering, or related field, 5+ years experience in system architecture for large-scale computing platforms, Hands-on experience with analytical and event-driven simulation models, Deep understanding of AI hardware architectures (compute, memory, interconnect), Strong knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to perform system-level performance, scalability, and power modeling, Proficiency in Python, C++, and PyTorch, Experience translating workload analysis into architectural design decisions 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Modeling, Simulation, Compute, Memory, Interconnect, Networking, Architecture, Performance, Scalability, Power 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Job Title: Staff Engineer, AI System Architect (Hardware) What You'll Do The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung's long-term AI platform strategy. Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42917 Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems. • Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale. • Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power. • Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. • Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices. • Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities. • Communicate architectural insights and recommendations through clear technical presentations and documentation. • Occasional domestic and international travel (<10%). What You Bring Ph.D. in Computer Science, Electrical Engineering, or a related field, with 5+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads. • Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation. • Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. • Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems. • Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions. • Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation. • Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams. • A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build. Understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Engineering role focused on developing and optimizing a trace-driven power and thermal simulation engine, integrating power macromodels, workload traces, and thermal solvers into a scalable system-level flow. The position involves building high-performance simulation frameworks and performing transient power and hotspot analysis. Daily onsite work in San Jose supporting advanced R&D in power and thermal modeling. 🗂️ Requirements: Bachelor’s degree with 5+ years experience or Master’s degree with 3+ years experience, Strong C++ software engineering experience, Experience building or extending simulation frameworks, Familiarity with discrete-event or time-stepped simulation architectures, Experience integrating IP-level power macromodels into system-level simulations, Ability to optimize performance and ensure scalability and reproducibility, Knowledge of numerical methods or reduced-order modeling 📃 Skills: C++, Simulation, Discrete-event, Time-stepped, Numerical-methods, Modeling, CFD, Thermal, Debugging, Optimization 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.The engineer develops and extends the trace‑driven power/thermal simulation engine, integrating power macromodels, workload traces, and thermal solvers into a coherent, scalable simulation flow. Location: Daily onsite presence at our San Jose, CA office in alignment with our Flexible Work policy Reports to: SVP, R&D (Power & Thermal Lab) What You'll Do Implement and optimize trace‑driven power and thermal simulation engines. Integrate IP‑level power macromodels into system‑level simulation. Manage a time‑indexed simulation flow across power and thermal domains. Generate transient power maps and perform spatiotemporal hotspot analysis. Interface with reduced‑order thermal models and CFD‑calibrated solvers. Ensure simulation performance, scalability, and reproducibility. What You Bring Bachelors degree 5+ years of experience or Masters degree 3+ years of experience. Strong C++ software‑engineering background. Experience building or extending simulation frameworks. Familiarity with discrete‑event or time‑stepped simulation architectures. Solid software‑design, debugging, and performance‑optimization skills. Preferred Qualifications Experience with time‑indexed and event‑driven simulation. Knowledge of numerical methods or reduced‑order modeling. Exposure to data‑pipeline integration. #LI-VL1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$138,000—$206,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Principal AI System Architect role focused on researching and designing next-generation AI hardware systems for large-scale workloads. The position involves leading architecture strategy, developing system-level performance models, and evaluating compute, memory, and interconnect architectures for AI scalability and efficiency. The role requires deep expertise in AI system architecture, simulation modeling, and large-scale AI workloads. 🗂️ Requirements: Ph.D. in Computer Science, Electrical Engineering, or related field preferred, 15+ years of experience in system architecture for large-scale computing platforms, Hands-on experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload characteristics into architectural design decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Modeling, Simulation, Architecture, Hardware, Networking, Memory, Interconnect 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. Responsibilities: - Technically lead the architecture team with strong direction, shaping system-architecture strategy and advancing key innovations - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections - Perform comparative studies of alternative system architectures and report performance and efficiency metrics - Collaborate with hardware architecture, memory, interconnect, and system engineering teams - Communicate architectural insights and recommendations through technical presentations and documentation - Occasional domestic and international travel under 10% What You Bring - Ph.D. in Computer Science, Electrical Engineering, or a related field preferred - 15+ years of experience in system architecture for large-scale computing platforms with a focus on AI workloads - Hands-on experience developing analytical and event-driven simulation models - Deep understanding of AI system hardware architectures including compute, memory hierarchies, and high-performance interconnects - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems - Ability to translate workload characteristics and modeling results into architectural design decisions - Proficiency in Python, C++, and PyTorch - Excellent written, verbal, and presentation communication skills - Collaborative mindset and resilience in solving complex system-level challenges What We Offer - Competitive compensation with incentive opportunities - Medical, Dental, Vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility and adoption support - Emotional wellness resources and therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for basic preparation, grammar, and research, but not for submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Staff Engineer role focused on end-to-end design of high-performance, low-power SRAM circuits for advanced semiconductor nodes (2nm–5nm). The position involves driving PPA optimization, circuit simulation, physical verification, and methodology development for next-generation computing and AI platforms. It combines deep SRAM technical expertise with leadership and cross-functional collaboration. 🗂️ Requirements: Bachelor’s in Electrical Engineering + 10+ years experience or Master’s + 8+ years experience, Proven experience in SRAM or memory circuit design at advanced process nodes, Expert knowledge of SRAM architecture including bitcells, sense amplifiers, write drivers, control paths, Strong understanding of semiconductor device physics and advanced process technologies, Experience with timing analysis, power analysis, and DFM, Proficiency in circuit simulation and variation analysis, Experience with physical verification (DRC, LVS), Knowledge of scripting for design automation, Experience with silicon debug and root-cause analysis, Experience with advanced nodes (5nm, 3nm, or below) 📃 Skills: SRAM, HSPICE, Finesim, Spectre, Cadence, Virtuoso, DRC, LVS, Python, Perl, TCL, FinFET, GAA, SOI, DFM, PPA 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do We are looking for a passionate and experienced Staff Engineer, SRAM Circuit Design to lead the development of next-generation SRAM solutions. In this position, you will drive end-to-end design of high-performance, low-power memory circuits used in cutting-edge semiconductor products. Your work will directly influence the power, performance, and area (PPA) efficiency of future computing, mobile, and AI platforms. This role combines deep technical expertise with strategic team leadership, offering the opportunity to innovate at the forefront of semiconductor design. Design and develop SRAM memory arrays, including bit cells, sense amplifiers, decoders and control circuits for advanced process nodes (e.g., 2nm, 3nm and 5nm). Optimize SRAM designs for performance, power and area (PPA) and yield. Develop custom layouts and perform physical design verifications (e.g., DRC, LVS). Evaluate trade-offs between speed, power, and area to meet design targets. Develop and improve SRAM design methodologies, including automation scripts for design, simulation, and verification. Work with product and test engineers to develop test plans and support silicon bring-up. Mentor Junior engineers, providing guidance on SRAM design techniques and best practices. Perform extensive circuit simulations using tools like HSPICE, finesim or cadence Spectre to validate SRAM functionality and performance. Contribute to patents, technical papers, or industry conferences to advance SRAM technology. What You Bring Bachelor's degree in electrical engineering with 10+ years of industry experience or master's degree in electrical engineering with 8+ years of experience strongly preferred. Prior experience in SRAM or memory circuit design, with a proven track record of delivering SRAM designs in advanced process nodes. Strong understanding of semiconductor devices physics and process technology (FinFET, GAA, SOI, etc.). Expertise in SRAM architecture, including bitcells, sense amplifiers, write drivers, and read/write control paths. Familiarity with timing analysis, power analysis, and design for manufacturability (DFM). Proficiency in circuit simulation, variation analysis, and design tools such as Spectre, HSPICE, Cadence Virtuoso, etc. Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation of design tasks. Strong cross-functional collaboration and communication skills for working with design, layout, verification, and technology development teams. Experience with advanced technology nodes (e.g., 5nm, 3nm, or beyond). Knowledge of SRAM compiler development and experience with low-power SRAM design techniques (e.g., power gating, voltage scaling). Background in silicon debug and root-cause analysis. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/