Senior Performance Engineer

🏢 Summary: Senior verification engineering role focused on AI accelerator IP and SoC verification, developing scalable verification infrastructure, automation, and test environments for next-generation AI/ML computing platforms. The position involves cross-functional collaboration with architects, RTL, compiler, and simulation engineers to validate functionality and performance of complex hardware systems. 🗂️ Requirements: Bachelor’s degree with 10+ years, Master’s degree with 8+ years, or PhD with 5+ years of industry experience, Strong SoC or IP verification experience, Experience with UVM and SystemVerilog testbench development, Proficiency in C/C++, Proficiency in Perl or Python scripting, Experience verifying IP blocks, dies, SoCs, and full systems from scratch, Strong RTL understanding and debugging skills, Background in microarchitecture and computer architecture, Ability to work cross-functionally with engineering teams, Excellent analytical and problem-solving skills 📃 Skills: UVM, SystemVerilog, C, C++, Perl, Python, RTL, SoC, FPGA, AI, ML, Emulation 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do - Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages. - Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers. - Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics. - Provide comprehensive documentation of verification strategy and ensure test environment is easy to use. - Mentor junior engineers when necessary. - Work cross-functionally in debugging failures with design, compiler and simulation engineers. What You Bring - Bachelor's with 10+ years, or Master's with 8+ years, or PhD's with 5+ years of industry experience. - Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python. - Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing. - Understanding RTL and strong overall debugging skills. - Prior experience with computational logic, interconnect networks and/or memory system is desirable. - Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators. - Knowledge of FPGA and emulation platforms preferred. - Strong analytical and problem-solving skills. - Excellent communication and interpersonal skills. - Ability to work independently and as part of a team. - You're inclusive, adapting your style to the situation and diverse global norms of our people. - An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. - You're collaborative, building relationships, humbly offering support and openly welcoming approaches. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Fertility care or adoption stipend, medical travel support, and virtual vet care. - On-demand wellness apps and confidential therapy sessions. - Onsite café and gym plus virtual fitness classes. - Flexible work environment. Base Pay Range: $163,000—$253,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Senior Engineer role focused on developing and optimizing RTL IP for memory-centric computing systems supporting advanced AI/ML workloads. The position involves hardware-software co-design, microarchitecture development, SOC integration, and performance optimization for next-generation AI systems. 🗂️ Requirements: Bachelor's degree with 10+ years of experience, Master's with 8+ years, or PhD with 5+ years, Strong background in microarchitecture and computer architecture, 5+ years of RTL front-end design methodology experience, Experience developing complex control and datapath IPs, Experience with Memory Controller, NOC, and Interconnect IP design, Experience with memory-centric computing IP and SOC integration, Experience with AI/ML workloads, Strong analytical and problem-solving skills, Excellent communication and interpersonal skills, Ability to work independently and collaboratively 📃 Skills: Verilog, SystemVerilog, HLS, RTL, Microarchitecture, SoC, NOC, Interconnect, AI, ML 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. We are looking for a Senior Engineer, RTL Memory Centric Computing. This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design. What You'll Do - Develop IP for memory centric computing systems using Verilog, System Verilog and HLS - Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression - Collaborate with Verification engineers to design and develop test plans - Make design decisions out of a large design trade-off space across performance, power, thermal, and cost - Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation - Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies - Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget - Complete other responsibilities as assigned What You Bring - Bachelor's with 10+ years, or Master's with 8+ years, or PhD's with 5+ years of industry experience - Strong background in microarchitecture and computer architecture - 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs - Experience in designing Memory Controller, NOC, Interconnect IP - Experience in Memory Centric computing IP and SOC integration - Experience in AI/ML workloads - Strong analytical and problem-solving skills - Excellent communication and interpersonal skills - Ability to work independently and as part of a team - You're inclusive, adapting your style to the situation and diverse global norms of our people - An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding - You're collaborative, building relationships, humbly offering support and openly welcoming approaches - Innovative and creative, you proactively explore new ideas and adapt quickly to change What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Give Back with a charitable giving match and frequent opportunities to get involved in supporting the community - Enjoy Time Away with 4+ weeks of paid time off a year, plus holidays and sick leave - Care for Family including fertility care or adoption support, medical travel support, and virtual vet care - Prioritize Emotional Wellness with on-demand apps and free confidential therapy sessions - Stay Fit with onsite café and gym, plus virtual classes - Embrace Flexibility through a flexible work environment Base Pay Range $163,000—$253,000 USD

🏢 Summary: Senior AI infrastructure role focused on co-designing hardware and software solutions for AI/ML inference workloads, optimizing LLM and agentic AI performance, and addressing memory bottlenecks in scalable computing platforms. The position involves collaboration across hardware and software teams, development of high-performance inference solutions, and technical leadership in AI system architecture. 🗂️ Requirements: Bachelor's degree with 15+ years, Master's degree with 13+ years, or PhD with 10+ years of industry experience, Experience developing high-performance AI framework software for GPUs or accelerators, Understanding of AI infrastructure and full AI software stack, Knowledge of LLM architectures and transformer-based models, Understanding of agentic AI architectures and workflows, Hands-on experience with PyTorch, Experience with vLLM for model inference and serving, Knowledge of memory wall challenges and AI system performance, Understanding of HBM and memory-centric compute architectures, Experience working in Linux environments, Proficiency with GitHub and Jira 📃 Skills: Python, PyTorch, vLLM, LLM, HBM, Linux, GitHub, Jira, GPU, Transformers, AI, ML 🏢 Description: Advancing the World's Technology Together The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. The team designs and develops scalable platforms that can effectively handle computational and memory requirements while minimizing energy consumption and maximizing performance. The role involves close collaboration with hardware and software engineers to address AI/ML workload challenges and explore new computing abstractions that balance hardware and software components. Location: Daily onsite presence at the San Jose, CA office in alignment with the Flexible Work policy. What You'll Do - Lead the co-design of software and hardware solutions that optimize AI model inference performance, with a focus on overcoming memory bottlenecks. - Analyze and optimize LLM and agentic AI workloads across the full software stack, identifying opportunities for hardware-aware acceleration. - Profile and characterize model execution to expose memory wall limitations and guide architectural decisions for HBM and memory-centric compute. - Collaborate with hardware teams to influence memory architecture, acceleration strategies, and compute placement based on real workload behavior. - Develop, optimize, and benchmark inference and serving solutions using frameworks such as PyTorch and vLLM. - Define best practices and provide technical mentorship across software–hardware co-design efforts. What You Bring - Bachelor's with 15+ years, or Master's with 13+ years, or PhD with 10+ years of industry experience. - Strong experience writing high-performance AI framework software development for GPUs or other accelerators. - Strong, end-to-end understanding of the AI infrastructure and AI software stack, from model definition through deployment and serving. - Solid understanding of LLM model architectures and workflows, including modern transformer-based designs. - Solid understanding of agentic AI architecture and workflows. - Hands-on expertise with the PyTorch framework. - Practical experience with vLLM for high-throughput model inference and serving. - Solid understanding of the memory wall problem and its impact on AI system performance. - Strong knowledge of memory architecture, including High Bandwidth Memory (HBM), and familiarity with memory-centric acceleration and compute approaches. - Proficiency working in a Linux development environment. - Solid command of development tooling, including agentic coding, GitHub and Jira. What We Offer - Competitive base pay range of $189,000—$301,000 USD. - Incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - 4+ weeks of paid time off, holidays, and sick leave. - Family support benefits including fertility care, adoption support, medical travel support, and virtual vet care. - Emotional wellness support with confidential therapy sessions and wellness apps. - Onsite café, gym, and virtual fitness classes. - Flexible work environment and charitable giving opportunities.

🏢 Summary: Senior Engineer role focused on RTL development for memory-centric computing systems within an AI research lab, driving hardware–software co-design for next-generation AI/ML platforms. The position involves designing and optimizing complex IP blocks for performance, power, and area, supporting scalable high-performance AI systems. The role requires deep expertise in microarchitecture, memory subsystems, and SoC integration. 🗂️ Requirements: Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD with 10+ years of industry experience, Strong background in microarchitecture and computer architecture, 5+ years of experience in RTL front-end design for complex control and datapath IP, Experience designing Memory Controller, NOC, or Interconnect IP, Experience with memory-centric computing IP and SoC integration, Experience with AI/ML workloads, Ability to optimize designs for performance, power, and area, Experience with hardware verification, debugging, and validation 📃 Skills: Verilog, SystemVerilog, HLS, RTL, Microarchitecture, ComputerArchitecture, MemoryController, NoC, Interconnect, SoC, AI, ML 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! We are looking for a Senior Engineer, RTL Memory Centric Computing. This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design. Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do Develop IP for memory centric computing systems using Verilog, System Verilog and HLS Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression. Collaborate with Verification engineers to design and develop test plans Make design decisions out of a large design trade-off space across performance, power, thermal, and cost. Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation. Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies. Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget Complete other responsibilities as assigned. What You Bring Bachelor's with 15+ years, or Master's with 13+ years, or PhD's with 10+ years of industry experience. Strong background in microarchitecture and computer architecture 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs Experience in designing Memory Controller, NOC, Interconnect IP Experience in Memory Centric computing IP and SOC integration Experience in AI/ML workloads. Strong analytical and problem-solving skills Excellent communication and interpersonal skills Ability to work independently and as part of a team You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change #LI-VL1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$189,000—$301,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior verification engineering role focused on developing and leading verification infrastructure for AI accelerator IP blocks and scalable AI/ML computing platforms. The position involves UVM/SystemVerilog-based verification, testbench development, debugging, and cross-functional collaboration with architecture, RTL, compiler, and simulation teams. 🗂️ Requirements: Bachelor's degree with 15+ years, Master's with 13+ years, or PhD with 10+ years of industry experience, Strong SoC or IP verification experience, Testbench development using UVM and SystemVerilog, Programming experience with C/C++, Scripting experience with Perl or Python, Experience verifying complex IP blocks, dies, SoCs, and full systems, Strong RTL understanding and debugging skills, Background in microarchitecture and computer architecture, Ability to work cross-functionally and independently, Excellent communication and interpersonal skills 📃 Skills: UVM, SystemVerilog, C, C++, Perl, Python, RTL, SoC, FPGA, AI, ML, Verification, Emulation 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving complex system-level challenges posed by future AI/ML workloads by designing scalable, high-performance, and energy-efficient platforms. The team collaborates closely with hardware and software engineers to address challenges across memory, computing, interconnect, and AI/ML technologies while researching emerging trends to support future workloads. Location: Daily onsite presence at the San Jose, CA office in alignment with the Flexible Work policy. What You'll Do - Develop the verification infrastructure and automation environment involved in build, simulation, regression, and triages - Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers - Create direct or random testbenches, define verification scope and test plans for both functional and performance validation, and close verification quality metrics - Provide comprehensive documentation of verification strategy and ensure the test environment is easy to use - Mentor junior engineers when necessary - Work cross-functionally in debugging failures with design, compiler, and simulation engineers What You Bring - Bachelor's with 15+ years, Master's with 13+ years, or PhD with 10+ years of industry experience - Strong background in SoC or IP verification and testbench development using UVM, SystemVerilog, C/C++, and scripting languages such as Perl/Python - Experience verifying at multiple levels of logic from complex IP blocks to dies, SoCs, and full system testing - Understanding of RTL and strong debugging skills - Prior experience with computational logic, interconnect networks, and/or memory systems is desirable - Strong background in microarchitecture and computer architecture, preferably in AI accelerators - Knowledge of FPGA and emulation platforms preferred - Strong analytical and problem-solving skills - Excellent communication and interpersonal skills - Ability to work independently and as part of a team - Inclusive and collaborative working style - Curiosity, resilience, and eagerness to learn What We Offer - Competitive compensation with incentive opportunities based on individual and company performance - Medical, Dental, Vision, and 401(k) benefits - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility care, adoption support, medical travel support, and virtual vet care - Emotional wellness support with on-demand apps and confidential therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range: $189,000—$301,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates who require support. Our Commitment to Innovation and Fairness AI tools may be used to support recruitment processes, but hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Senior compiler engineering role focused on building AI/ML compiler infrastructure for next-generation hardware accelerators, including PyTorch backend integration, kernel DSL development, distributed memory scheduling, and performance optimization. The position involves working on MLIR, Triton-style DSLs, parallelism-aware lowering, and upstream open-source contributions for scalable AGI computing platforms. Daily onsite presence in San Jose is required. 🗂️ Requirements: Bachelor's degree with 10+ years of industry experience, or Master's with 8+ years, or PhD with 5+ years, 3-5+ years of experience with Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, or equivalent, Experience designing kernel DSLs or intermediate representations, Experience with MLIR dialects, passes, or backend integration, Experience building PyTorch backends for non-CUDA accelerators, Experience with kernel autotuning, performance modeling, or cost-based compilation, Background in HPC, distributed systems, or NUMA-aware programming, Ability to contribute to open-source compiler projects 📃 Skills: PyTorch, Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, LLVM, CUDA, ROCm, MPS, TPU, DSL, IR, HPC, NUMA 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do - Adapting torch.compile to our backend: lowering Inductor's IR to our hardware, defining what gets fused, what gets specialized, and where the compiler should yield to hand-written kernels. - Building or extending kernel DSLs for our hardware: taking a tile-based programming model (Triton-style), a higher-level expression (Helion-style), or a custom DSL we design, and lowering it to our ISA, our memory hierarchy, and our collective primitives. Where existing DSLs' GPU assumptions break, deciding what to change in the frontend, the IR, or the backend. - Designing placement and scheduling passes: given a graph and our distributed memory model, deciding where tensors live, when to migrate them, and how to overlap compute with data movement. This is the layer where our hardware's differentiator shows up most directly. - Implementing parallelism-aware lowering: making tensor, pipeline, expert, and sequence parallelism first-class in the compiler IR rather than bolted on at the framework layer. - Fusion, tiling, and memory planning: the classical compiler problems, reframed for a non-uniform memory hierarchy where the right tile size and the right placement are coupled decisions. - Upstream contributions: where we use open-source DSLs, we want our work to land upstream rather than live in a private fork. You'll engage with upstream review processes for PyTorch, Triton, Helion, and adjacent projects. What You Bring - Bachelor's with 10+ years, or Master's with 8+ years, or PhD's with 5+ years of industry experience. - 3-5+ years of industry experience in at least one of: Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, or a proprietary equivalent. - Experience designing a kernel DSL or its IR from scratch, or making non-trivial language-level changes to an existing one. - Experience with MLIR — writing dialects, passes, or backend integration. - Experience building PyTorch backends for non-CUDA accelerators (XPU, ROCm, MPS, TPU, custom). - Experience with kernel autotuning, performance modeling, or cost-based compilation. - Background in HPC, distributed systems, or NUMA-aware programming. - Open-source contributions to PyTorch, Triton, Helion, LLVM/MLIR, or similar projects is a big plus. What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. - Charitable giving match and community involvement opportunities. - 4+ weeks of paid time off plus holidays and sick leave. - Fertility care or adoption stipend, medical travel support, and virtual vet care. - On-demand wellness apps and free confidential therapy sessions. - Onsite café and gym, plus virtual fitness classes. - Flexible work environment. - Base pay range: $163,000—$253,000 USD. Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not to generate submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.

🏢 Summary: Senior-level role focused on leading verification of AI accelerator IP blocks and building scalable verification infrastructure for advanced SoC systems. The position involves developing UVM-based testbenches, driving functional and performance validation, and collaborating cross-functionally to debug and close quality metrics. The role supports next-generation AI/ML hardware platforms with emphasis on architecture-level verification and system-level validation. 🗂️ Requirements: 15+ years (BS) or 13+ years (MS) or 10+ years (PhD) industry experience, Strong experience in SoC/IP verification, Proven expertise in UVM-based testbench development, Proficiency in SystemVerilog and C/C++, Experience with scripting using Perl or Python, Experience verifying complex IP to full SoC/system level, Strong RTL understanding and debugging skills, Background in microarchitecture and computer architecture, Ability to lead verification efforts and mentor engineers 📃 Skills: UVM, SystemVerilog, C, C++, Perl, Python, RTL, SoC, IP, FPGA, Emulation 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages. Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers. Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics. Provide comprehensive documentation of verification strategy and ensure test environment is easy to use. Mentor junior engineers when necessary Work cross-functionally in debugging failures with design, compiler and simulation engineers What You Bring Bachelor's with 15+ years, or Master's with 13+ years, or PhD's with 10+ years of industry experience. Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python. Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing Understanding RTL and strong overall debugging skills Prior experience with computational logic, interconnect networks and/or memory system is desirable Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators Knowledge of FPGA and emulation platforms preferred Strong analytical and problem-solving skills Excellent communication and interpersonal skills Ability to work independently and as part of a team You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. #LI-VL1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$189,000—$301,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Principal Engineer role focused on AI system architecture research and technical leadership for next-generation AI hardware platforms. The position involves developing system-level performance models, evaluating AI workloads, and driving architecture decisions across compute, memory, and interconnect systems. Daily onsite work in San Jose with collaboration across hardware and system engineering teams. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 15+ years of experience in AI system architecture for large-scale computing platforms, Hands-on experience with analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload modeling into architectural decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLMs, DLRMs, Modeling, Simulation, Architecture, Hardware, Memory, Interconnect, Networking 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape long-term AI platform strategy. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Technically lead the architecture team with strong direction, shaping system-architecture strategy and advancing key innovations - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale - Analyze representative and emerging system-level architectural research including LLMs, DLRMs, and future AI models to derive architecture requirements and trade-offs across compute, memory, networking, and power - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections - Perform comparative studies of alternative system architectures and report performance and performance-per-watt metrics - Collaborate with cross-functional teams in hardware architecture, memory, interconnect, and system engineering - Communicate architectural insights and recommendations through technical presentations and documentation - Occasional domestic and international travel under 10% What You Bring - PhD in Computer Science, Electrical Engineering, or a related field preferred - 15+ years of experience in system architecture for large-scale computing platforms with a strong focus on AI workloads - Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation - Deep understanding of AI system hardware architectures including compute, memory hierarchies, and high-performance interconnects - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems - Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions - Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation - Excellent written, verbal, and presentation communication skills - Collaborative mindset, intellectual curiosity, and resilience in tackling complex system-level challenges What We Offer The pay range varies by work location and depends on job-related knowledge, skills, and experience. Incentive opportunities are offered in addition to benefits. Benefits include: - Medical, Dental, Vision, and 401k plans - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Fertility care or adoption stipend, medical travel support, and virtual vet care - On-demand wellness apps and confidential therapy sessions - Onsite café and gym plus virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiters and hiring managers. Applicant AI Use Policy Candidates may use AI tools for preparation, grammar, and research, but not for generating submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers. Applicant Privacy Policy https://semiconductor.samsung.com/about-us/careers/us/privacy/

🏢 Summary: Senior Staff AI System Architect role focused on researching and designing next-generation AI systems for large-scale workloads. The position involves building system-level performance models, analyzing AI architectures, and driving design decisions across compute, memory, and networking subsystems. The role requires strong expertise in AI hardware architectures, simulation modeling, and AI workloads such as LLMs and DLRMs. 🗂️ Requirements: PhD in Computer Science, Electrical Engineering, or related field, 5+ years of experience in system architecture for large-scale computing platforms, Experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload analysis into architectural decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Simulation, Modeling, Architecture, Networking, Memory, Compute 🏢 Description: Advancing the World's Technology Together Our technology solutions power the tools you use every day—including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging advanced memory technologies, the team explores and defines next-generation AI system architectures that deliver major improvements in performance, efficiency, and scalability. We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. What You'll Do - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems. - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks. - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models. - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections. - Perform comparative studies of alternative system architectures and report performance-per-watt metrics. - Collaborate with cross-functional teams in hardware architecture, memory, interconnect, and system engineering. - Communicate architectural insights and recommendations through technical presentations and documentation. - Occasional domestic and international travel under 10%. What You Bring - PhD in Computer Science, Electrical Engineering, or a related field. - 5+ years of experience in system architecture for large-scale computing platforms focused on AI workloads. - Hands-on experience developing analytical and event-driven simulation models. - Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects. - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems. - Ability to translate workload characteristics and modeling results into actionable architectural decisions. - Proficiency in Python, C++, and PyTorch. - Excellent written, verbal, and presentation communication skills. - Collaborative mindset and ability to tackle complex system-level challenges. What We Offer - Competitive base pay range of $163,000–$253,000 USD. - Incentive opportunities based on individual and company performance. - Medical, Dental, Vision, and 401(k) benefits. - 4+ weeks of paid time off plus holidays and sick leave. - Support for fertility care, adoption, medical travel, and virtual pet care. - Emotional wellness support including therapy sessions and wellness apps. - Onsite café, gym, and virtual fitness classes. - Flexible work environment and community giving opportunities. Equal Opportunity Employment Policy Samsung Semiconductor is committed to fostering an inclusive workplace and providing accommodations throughout the recruiting process for candidates with disabilities or other support needs. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but hiring decisions are made by human recruiting teams and hiring managers. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers.

🏢 Summary: Principal AI System Architect role focused on researching and designing next-generation AI hardware systems for large-scale workloads. The position involves leading architecture strategy, developing system-level performance models, and evaluating compute, memory, and interconnect architectures for AI scalability and efficiency. The role requires deep expertise in AI system architecture, simulation modeling, and large-scale AI workloads. 🗂️ Requirements: Ph.D. in Computer Science, Electrical Engineering, or related field preferred, 15+ years of experience in system architecture for large-scale computing platforms, Hands-on experience developing analytical and event-driven simulation models, Deep understanding of AI hardware architectures, Knowledge of LLMs, DLRMs, and large-scale AI training and inference systems, Ability to translate workload characteristics into architectural design decisions, Proficiency in Python, Proficiency in C++, Proficiency in PyTorch, Strong technical communication and presentation skills 📃 Skills: Python, C++, PyTorch, AI, LLM, DLRM, Modeling, Simulation, Architecture, Hardware, Networking, Memory, Interconnect 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. What You'll Do The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability. We are seeking a Principal AI System Architect who will play a Technical Lead role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures. Location: Daily onsite presence at the San Jose office in alignment with the Flexible Work policy. Responsibilities: - Technically lead the architecture team with strong direction, shaping system-architecture strategy and advancing key innovations - Conduct system-level architectural research for next-generation AI systems spanning compute, memory, and interconnect/network subsystems - Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks - Analyze representative and emerging AI workloads including LLMs, DLRMs, and future AI models - Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections - Perform comparative studies of alternative system architectures and report performance and efficiency metrics - Collaborate with hardware architecture, memory, interconnect, and system engineering teams - Communicate architectural insights and recommendations through technical presentations and documentation - Occasional domestic and international travel under 10% What You Bring - Ph.D. in Computer Science, Electrical Engineering, or a related field preferred - 15+ years of experience in system architecture for large-scale computing platforms with a focus on AI workloads - Hands-on experience developing analytical and event-driven simulation models - Deep understanding of AI system hardware architectures including compute, memory hierarchies, and high-performance interconnects - Strong knowledge of modern and emerging AI workloads including LLMs, DLRMs, and large-scale training and inference systems - Ability to translate workload characteristics and modeling results into architectural design decisions - Proficiency in Python, C++, and PyTorch - Excellent written, verbal, and presentation communication skills - Collaborative mindset and resilience in solving complex system-level challenges What We Offer - Competitive compensation with incentive opportunities - Medical, Dental, Vision, and 401(k) - Charitable giving match and community involvement opportunities - 4+ weeks of paid time off plus holidays and sick leave - Family support benefits including fertility and adoption support - Emotional wellness resources and therapy sessions - Onsite café, gym, and virtual fitness classes - Flexible work environment Base Pay Range $219,000—$351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor is an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel. Our Commitment to Innovation and Fairness AI tools may be used in the recruitment process as support tools, but all hiring decisions are made by human recruiting teams and hiring managers. Applicant AI Use Policy Candidates may use AI tools for basic preparation, grammar, and research, but not for submitted content or live interview responses. Trade Secret Notice By submitting an application, candidates agree not to disclose confidential or proprietary information belonging to current or former employers or other entities.