April 25, 2026

Staff Engineer, AI System Architect (Hardware)

Senior • On-site

San Jose, CA

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World's Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.

Job Title: Staff Engineer, AI System Architect (Hardware)

What You'll Do
The Architecture Research Lab (ARL) focuses on addressing fundamental system-level bottlenecks in modern AI, particularly in memory capacity/bandwidth and system-scale communication. By leveraging Samsung's world-class memory technologies, ARL explores and defines next-generation AI system architectures that deliver step-function improvements in performance, efficiency, and scalability.
We are seeking a Senior Staff AI System Architect who will play a key role in bridging AI workloads, system architecture, and hardware design. In this role, you will develop system-level performance models, drive architecture-level design decisions, and propose forward-looking AI system architectures that shape Samsung's long-term AI platform strategy.

Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy

Job ID: 42917

  • Conduct system-level architectural research for next-generation AI systems, spanning compute, memory, and interconnect/network subsystems.
    • Develop and maintain analytical and simulation-based system modeling frameworks to evaluate AI workloads and identify performance, scalability, and efficiency bottlenecks at rack- and system-scale.
    • Analyze representative and emerging AI workloads (e.g., LLMs, DLRMs, and future AI models) to derive architecture requirements and trade-offs across compute, memory, networking, and power.
    • Drive architecture-level design decisions through quantitative modeling, design-space exploration, and performance/power projections.
    • Perform comparative studies of alternative system architectures, reporting performance and performance-per-watt metrics to guide strategic technology choices.
    • Collaborate closely with cross-functional teams in hardware architecture, memory, interconnect, and system engineering to align modeling insights with implementation realities.
    • Communicate architectural insights and recommendations through clear technical presentations and documentation.
    • Occasional domestic and international travel (<10%).

What You Bring

  • Ph.D. in Computer Science, Electrical Engineering, or a related field, with 5+ years of experience in system architecture for large-scale computing platforms, with a strong focus on AI workloads.
    • Proven hands-on experience developing analytical and event-driven simulation models for system-level performance evaluation.
    • Deep understanding of AI system hardware architectures, including compute, memory hierarchies, and high-performance interconnects.
    • Strong knowledge of modern and emerging AI workloads, including LLMs, DLRMs, and large-scale training and inference systems.
    • Demonstrated ability to translate workload characteristics and modeling results into actionable architectural design decisions.
    • Proficiency in Python, C++, and PyTorch for modeling, analysis, and experimentation.
    • Excellent written, verbal, and presentation communication skills, with the ability to influence technical direction across teams.
    • A collaborative mindset, intellectual curiosity, and resilience in tackling complex, open-ended system-level challenges.
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • You approach challenges with curiosity and resilience, seeking data to help build.
  • Understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches.

#LI-SF1

What We Offer
The pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance.


This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.

Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.

Base Pay Range
$163,000$253,000 USD

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

Recruiting Agency Policy

We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.

Applicant AI Use Policy

At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.

Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/

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The work directly influences core design decisions and may lead to patents and publications. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science or related field, 5+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM or x86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines and speculation, Strong knowledge of cache coherence, memory systems, prefetching and NUMA, Hands-on experience with architectural simulators, Strong programming skills in C/C++ and Python, Experience analyzing large performance datasets and traces, Prior tapeout experience 📃 Skills: RISC-V, ARM, x86, gem5, C, C++, Python, SPEC, NUMA, SIMD 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Staff, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is looking for Staff CPU Architecture & Performance Engineer to drive detailed performance analysis and architectural optimization for current and next-generation CPU (RISC-V) cores. This role focuses on deep ownership of performance-critical micro-architectural domains, workload analysis, and data-driven recommendations that influence core architecture decisions. You will work closely with architects, design, compiler, and system teams to evaluate trade-offs, identify bottlenecks, and improve performance across real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42850 Own performance analysis for one or more CPU microarchitectural domains (e.g., frontend, execution engine, memory subsystem). Build, extend, and validate architectural performance models and simulators. Perform CPI/IPC breakdowns and root-cause performance bottlenecks. Evaluate microarchitectural features and optimizations using trace-driven, analytical, and cycle-accurate models. Characterize workloads and benchmarks (SPEC, server, client, AI/ML, internal traces). Translate performance data into clear architectural recommendations. Work leading to patents and publication. What You Bring Master's in Computer Engineering, Computer Science or related filed with 8+ years of experience or PhD in Computer Engineering, Computer Science, or related field with 5+ years of experience. 5+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Experience analyzing large performance datasets and traces. Familiarity with compiler optimizations and hardware/software co-design.. Proven ability - prior tapeout experience. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience / Familiarity with SIMD / Vectors / VME for AI inference workloads.. Prior leadership guiding junior engineers. Prior patent / publication experience. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

Technology

Samsung

Senior Staff Engineer, Design Verification

Senior

On-site

San Jose, CA

🏢 Summary: Senior-level role focused on leading verification of AI accelerator IP blocks and building scalable verification infrastructure for advanced SoC systems. The position involves developing UVM-based testbenches, driving functional and performance validation, and collaborating cross-functionally to debug and close quality metrics. The role supports next-generation AI/ML hardware platforms with emphasis on architecture-level verification and system-level validation. 🗂️ Requirements: 15+ years (BS) or 13+ years (MS) or 10+ years (PhD) industry experience, Strong experience in SoC/IP verification, Proven expertise in UVM-based testbench development, Proficiency in SystemVerilog and C/C++, Experience with scripting using Perl or Python, Experience verifying complex IP to full SoC/system level, Strong RTL understanding and debugging skills, Background in microarchitecture and computer architecture, Ability to lead verification efforts and mentor engineers 📃 Skills: UVM, SystemVerilog, C, C++, Perl, Python, RTL, SoC, IP, FPGA, Emulation 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do Develop the verification infrastructure and automation environment involved in build, simulation, regression and triages. Lead the verification for IP blocks of an AI accelerator by working with architects and RTL engineers. Create direct or random testbench, define verification scope and test plans for both functional and performance validation, close the verification quality metrics. Provide comprehensive documentation of verification strategy and ensure test environment is easy to use. Mentor junior engineers when necessary Work cross-functionally in debugging failures with design, compiler and simulation engineers What You Bring Bachelor's with 15+ years, or Master's with 13+ years, or PhD's with 10+ years of industry experience. Strong background in SoC or IP verification and test bench development using UVM, System Verilog, C/C++ and scripting languages such as Perl/Python. Experience verifying at multiple levels of logic from scratch, starting from complex IP blocks to dies to SoCs to full system testing Understanding RTL and strong overall debugging skills Prior experience with computational logic, interconnect networks and/or memory system is desirable Strong background in microarchitecture and computer architecture preferably in the area of AI accelerators Knowledge of FPGA and emulation platforms preferred Strong analytical and problem-solving skills Excellent communication and interpersonal skills Ability to work independently and as part of a team You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. #LI-VL1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$189,000—$301,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

Technology

Samsung

Senior Staff Engineer, RTL Memory Centric Computing

Senior

On-site

San Jose, CA

🏢 Summary: Senior Engineer role focused on RTL development for memory-centric computing systems within an AI research lab, driving hardware–software co-design for next-generation AI/ML platforms. The position involves designing and optimizing complex IP blocks for performance, power, and area, supporting scalable high-performance AI systems. The role requires deep expertise in microarchitecture, memory subsystems, and SoC integration. 🗂️ Requirements: Bachelor’s with 15+ years, or Master’s with 13+ years, or PhD with 10+ years of industry experience, Strong background in microarchitecture and computer architecture, 5+ years of experience in RTL front-end design for complex control and datapath IP, Experience designing Memory Controller, NOC, or Interconnect IP, Experience with memory-centric computing IP and SoC integration, Experience with AI/ML workloads, Ability to optimize designs for performance, power, and area, Experience with hardware verification, debugging, and validation 📃 Skills: Verilog, SystemVerilog, HLS, RTL, Microarchitecture, ComputerArchitecture, MemoryController, NoC, Interconnect, SoC, AI, ML 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing! We are looking for a Senior Engineer, RTL Memory Centric Computing. This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design. Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy. What You'll Do Develop IP for memory centric computing systems using Verilog, System Verilog and HLS Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression. Collaborate with Verification engineers to design and develop test plans Make design decisions out of a large design trade-off space across performance, power, thermal, and cost. Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation. Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies. Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget Complete other responsibilities as assigned. What You Bring Bachelor's with 15+ years, or Master's with 13+ years, or PhD's with 10+ years of industry experience. Strong background in microarchitecture and computer architecture 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs Experience in designing Memory Controller, NOC, Interconnect IP Experience in Memory Centric computing IP and SOC integration Experience in AI/ML workloads. Strong analytical and problem-solving skills Excellent communication and interpersonal skills Ability to work independently and as part of a team You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change #LI-VL1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$189,000—$301,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

Technology

Samsung

Principal Engineer, CPU Architecture & Performance Research

Senior

On-site

San Jose, CA

20,000 - 20,833 USD/yr

🏢 Summary: Principal-level role leading research, modeling, and optimization of next-generation RISC-V CPU microarchitectures with end-to-end performance focus from architectural exploration to silicon correlation. The position drives performance analysis, workload characterization, and cross-stack optimization in collaboration with architecture, design, compiler, and system teams. It includes technical leadership and influence on future core definitions through quantitative analysis. 🗂️ Requirements: Master’s or PhD in Computer Engineering, Computer Science, or related field, 15+ years of experience with PhD or 18+ years with Master’s, 10+ years of experience in CPU microarchitecture or performance engineering, Experience with RISC-V, ARM, or X86 architectures, Strong knowledge of out-of-order execution, branch prediction, pipelines, speculation, Strong knowledge of cache coherence, memory systems, prefetching, NUMA, Experience with architectural simulators, Proficiency in C/C++ and Python, Experience with workload characterization and performance analysis, Experience influencing architectural decisions through quantitative analysis 📃 Skills: RISC-V, ARM, X86, gem5, C, C++, Python, SIMD, VME, SPEC, NUMA, RTL 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities. Principal, CPU Architecture & Performance Research Engineer What You'll Do Architecture Research Lab is seeking Principal CPU Architecture & Performance Engineer to lead the definition, analysis, and optimization of next-generation CPU microarchitectures (RISC-V core). This role is focused on end-to-end performance: from architectural trade-offs and workload characterization to micro-architectural modeling, simulation, and silicon bring-up correlation. You will work closely with architecture, design, compiler, and system teams to drive performance and efficiency across a broad set of real-world workloads Location: Daily onsite presence at our San Jose office in alignment with our Flexible Work policy Job ID: 42918 Define and evaluate CPU micro-architectural features for future cores (frontend, execution engine, memory hierarchy, interconnect). Lead performance analysis using simulators, RTL. Help develop and validate performance models (cycle-accurate, trace-driven, statistical). Characterize workloads (SPEC, server, client, AI/ML, cloud, internal traces) and translate findings into architectural requirements. Identify performance bottlenecks and propose data-driven optimizations. Drive architecture-to-implementation alignment with design team. Collaborate with compiler, OS, and system architects on cross-stack performance issues. Mentor senior and staff engineers; provide technical leadership across projects. Work leading to patents and publication What You Bring Master's with 18+ years of experience in Computer Engineering, Computer Science, or related field. or PhD with 15+ years of experience preferred. 10+ years of experience in CPU microarchitecture and/or performance engineering. Experience with RISC-V, ARM or X86 architectures. Strong understanding of: Out-of-order execution, branch prediction, pipelines, and speculation Cache coherence, memory systems, prefetching, and NUMA effects Hands-on experience with architectural simulators (like gem5). Strong programming skills in C/C++ and Python. Familiarity with compiler optimizations and hardware/software co-design. Familiarity with SIMD / Vectors / VME for AI inference workloads. Experience analyzing large performance datasets and traces. Proven ability (Tapeout / Patents /Publications) to influence architecture / micro architectural decisions through quantitative analysis. Preferred Qualifications Background in power/performance/area (PPA) trade-off analysis. Experience with SIMD/Vectors. Experience with compiler optimizations and hardware/software co-design. Prior technical leadership at Senior Staff or Principal level. You're inclusive, adapting your style to the situation and diverse global norms of our people. You approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-SF1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

Technology

Samsung

Staff Engineer, Memory Systems Architecture

Senior

On-site

San Jose, CA

🏢 Summary: Staff Engineer role focused on memory systems architecture and in-field DRAM fault management for data center and AI/ML environments. The position involves analyzing large-scale telemetry data to identify failure modes, design RAS algorithms, and reduce system downtime through proactive memory fault mitigation. The role includes ECC design, failure analysis, and collaboration on industry standards for DRAM/HBM failure logging. 🗂️ Requirements: Bachelor’s degree with 10+ years / Master’s with 8+ years / PhD with 5+ years in hardware fault management or related field, Experience in hardware fault management, reliability, or data center fleet management, Knowledge of memory subsystems and platform RAS features, Experience with ECC design, verification, and reverse engineering, Understanding of CPU-to-memory address mapping, Experience modifying memory controller registers, Linux kernel commit experience, Understanding of DRAM and HBM failure modes 📃 Skills: DRAM, HBM, ECC, RAS, Linux, Telemetry, SoC, DIMM, OCP, AI, ML 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.Samsung Semiconductor is hiring now for a Staff Engineer, Memory Systems Architecture. The conventional DRAM failure analysis was physical electrical FA and physical FA. But, in the era of Data center, it is easier to track the field failure information. With this data set, Fault management team's role is finding DRAM failure mode, abnormality and failure rate projection. You will be part of an incubation team working on in-field telemetry intended to transform the Customer Quality Experience for Samsung memory products. Fault Management is the future of quality to minimize system downtime within AI/ML hardware deployments and workloads of the future. We analyze trends and patterns from enormous memory fleet telemetry to bucketize failures and perform virtual root-cause analysis. Telemetry analysis helps us design solutions to proactively avoid system downtime. We conduct research and develop both in-house and collaboratively in the industry with the opportunity to publish our findings through whitepapers and conferences. We are looking for innovative and passionate thinkers who can work in a start-up environment and are excited to shape the future of data centers around the world. Join us in our mission! What You'll Do Based on the knowledge of SOC controller and memory operation including RAS feature, find and recommends better solution to mitigate the field DRAM failure rate. Needs to communicate better ECC scheme to customers based on Samsung DRAM failure mode(DQ and burst) Interface with customers to establish the value add of enabling in-field fault management architecture Contribute to the standardization of DRAM/HBM failure logging in the OCP. Propose and develop platform RAS (Reliability Availability Serviceability) algorithms for memory fault management such as page offlining, hPPR and conduct POC with known failure DIMMs in the real server and application. Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work Policy. Job ID: 42886 What You Bring Bachelor's degree with 10+ years of relevant industry experience, or Master's with 8+ years or PhD with 5+ years hardware fault management, reliability, data center fleet management experience or related technical field preferred. (Must) Knowledge of platform memory subsystem, platform RAS (Reliability Availability Serviceability) such as ECC, page offlining, hPPR and hardware sparing. ECC design and verification and reverse engineering experience. Understanding on the address mapping between CPU and memory. Memory controller register modification. Linux kernel commit experience. DRAM and HBM failure mode understanding. You're inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You're collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-MD1 What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$163,000—$253,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/

Technology

Samsung

Principal Engineer, RTL Power Macromodeling

Senior

On-site

San Jose, CA

240,000 - 249,996 USD/yr

🏢 Summary: Senior RTL Engineer role focused on developing high-fidelity power macromodels for AI memory IP by translating RTL/SystemC/C behavior into time-indexed, input-dependent power models. The position involves power feature extraction, model calibration, and validation against RTL, gate-level, and silicon data. The role requires onsite collaboration to enable scalable, system-level power simulation. 🗂️ Requirements: Bachelor’s degree with 20+ years of experience or Master’s degree with 18+ years of experience, Strong RTL design, synthesis and analysis experience, Proficiency in Verilog, SystemVerilog and SystemC, Solid understanding of dynamic and leakage power in CMOS and interconnects, Hands-on experience with logic synthesis and power analysis tools, Experience with power modeling and architectural power analysis, Ability to abstract RTL into analytical, LUT, FSM or ML-based models, Experience with trace-driven power modeling and model validation 📃 Skills: Verilog, SystemVerilog, SystemC, C, CMOS, VCS, VCFormal, DesignCompiler, PrimeTimePX, StarRC, PowerArtist, Verdi, McPAT, CACTI, Wattch, PlatformArchitect, RTL, FSM, LUT, ML 🏢 Description: Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World's Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you'll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what's possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. Together, we're building a better tomorrow for our employees, customers, partners, and communities.What You'll Do We are seeking an RTL engineer to develop high-fidelity, advanced IP-level power macromodels for AI computing memory component IPs. The role focuses on translating RTL/SystemC/C behavior into time-indexed, input-dependent power models. Location: Daily onsite presence at our San Jose, CA office in alignment with our Flexible Work policy Reports to: SVP, R&D (Power & Thermal Lab) Develop high-fidelity, advanced RTL- SystemC-, and C-based power macromodels for AI memory component IPs using analytical modeling, LUT, FSM, NN, and their hybrid. Extract activity-, value-, and state-dependent power features from C/SystemC/RTL simulations. Define power-relevant functional states (transaction/state-based abstraction). Support trace-driven power modeling, aligned with C/SystemC workload traces. Perform synthesis-assisted calibration using average and worst-case power anchors when available. Validate macromodel accuracy against reference RTL/gate-level results and real-silicon data when available. Collaborate with software engineers on feature semantics, timing alignment, and model interfaces. Contribute to scalable IP-wise composition for full-system power simulation. What You Bring Bachelors degree 20+ years of experience or Masters degree 18+ years of experience. Strong RTL design, synthesis and analysis experience (Verilog/SystemVerilog/SystemC). Solid understanding of dynamic and leakage power mechanisms in CMOS and interconnects. Hands-on experience with logic synthesis and power analysis tools, including VCS, VC Formal, Design Compiler, PrimeTime-PX, StarRC, PowerArtist, Verdi, etc. Hands-on experience with power modeling in academia, including McPAT, CACTI, Wattch, etc. and industry tools such as Synopsys Platform Architect. Familiarity with SystemC or transaction-level modeling. Ability to abstract RTL behavior into compact analytical, table-based, FSM-based, and AL/ML models. Knowledge of power macromodeling, power estimation flows, or architectural power analysis. Preferred Qualifications Experience with GPU, computer architecture, AI memory, memory controllers, PHYs, or high-speed I/O. Knowledge of cross-coupling capacitance, clock power modeling, and power and signal integrity. Exposure to low-power design and thermal management. Exposure to power macromodeling, power estimation flows, or architectural power analysis. What We OfferThe pay range below is for all roles at this level across all US locations and functions. Paywithin this range varies by work locationand may also depend on job-related knowledge, skills,and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.Enjoy Time Away You'll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you'll have support no matter where you are.Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.Embrace Flexibility Benefits are best when you have the space to use them. That's why we facilitate a flexible environment so you can find the right balance for you.Base Pay Range$219,000—$351,000 USDEqual Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate's genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process. Applicant Privacy Policyhttps://semiconductor.samsung.com/about-us/careers/us/privacy/