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November 3, 2026

Senior Silicon Bring-Up Engineer

Senior • On-site

312,000 - 353,600 PLN/yr

Warsaw, Poland

Quick Facts

Role: Senior Silicon Bring-Up Engineer (B2B)

  • Location: Warsaw (on-site)
  • Start: ASAP
  • Rate: 150–170 PLN/h + VAT
  • Recruitment process: short call with recruiter → client interview → decision

Description

Own pre-silicon readiness and first silicon bring-up for SoCs, including bring-up plans, test checklists, laboratory infrastructure, first power-on, clock/reset and power sequencing (PMIC, PLL, OTP, BootROM/bootloaders). Validate IP blocks and high-speed interfaces (DDR/LPDDR, PCIe, USB, MIPI, I2C/SPI/UART, Ethernet, SerDes) with DDR training and link margining. Debug complex hardware/firmware root causes using JTAG/SWD and lab instrumentation, then deliver corrective firmware/diagnostic software and support the transition to production testing.

Responsibilities

  • Supervise pre-silicon readiness: run plans, test checklists, boot flows, and lab infrastructure before first samples
  • Perform first power-on and initial SoC bring-up: clocks, resets, PMIC power sequencing, PLL, OTP fuses, BootROM, and early bootloaders
  • Bring up and validate IP blocks and fast interfaces: DDR/LPDDR, PCIe, USB, MIPI, I2C/SPI/UART, Ethernet, SerDes; DDR training and link margining
  • Debug complex hardware and firmware issues using JTAG/SWD, logic analyzers, oscilloscopes, protocol analyzers, and ETM/STM tracing
  • Triaging silicon bugs: isolate root cause (hardware vs firmware), document errata, design and validate fixes
  • Create and maintain bring-up and diagnostic firmware, test environments, and measurement-station automation
  • Collaborate with project, validation, packaging, board, and product engineering teams to correlate silicon with simulation/emulation
  • Support characterization across voltage/frequency/temperature and optimize power and performance
  • Manage bring-up schedules, report status, perform readiness audits, and mentor junior engineers
  • Support mass production ramp: yield debug, production test debug, and production diagnostics

Requirements

  • Advanced technical degree (Electrical Engineering, Computer Engineering, Computer Science, or related)
  • Minimum 7 years of experience in silicon bring-up, embedded firmware, or SoC validation (including taking a system from first power-on to production)
  • Expert programming in C and Assembly
  • Python knowledge for test automation
  • Deep understanding of SoC architecture: memory maps, interrupts, DMA, clocks, power/reset domains, boot flow
  • Hands-on experience with ARM or RISC-V SoCs and bare-metal/RTOS environments
  • Experience with lab equipment and debug tools (JTAG, oscilloscopes, logic/protocol analyzers)
  • Ability to read electrical schematics, PCB layouts, and silicon specs; debug at register level
  • Ability to work under uncertainty and time pressure in a lab environment
  • English level B2 or higher

Benefits

  • Medical and sports package
  • Free accounting support (up to 3 entries per month)
  • Work on an interesting and development-oriented project
  • Clear cooperation terms with a stable and secure market position

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