ASIC Design Verification and Methodology Engineer, Google Cloud

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 5 years of experience with Design Verification.
• Experience with SystemVerilog or other hardware verification languages.
• Experience with scripting languages such as Python or Perl.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience managing and contributing across the entire design and verification life cycle.
• Experience optimizing tools, flows, and methodologies to improve efficiency.
• Excellent problem solving and communication skills.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

In this role, you will drive the efficiency of chip execution by creating and deploying design platforms. As an ASIC Design Verification and Methodology Engineer, you will be the catalyst for change, collaborating with hardware teams across all domains. The mission will be to identify process issues, then create, propose, and deploy high-impact solutions on active projects improving chip development flow.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Lead and execute high-quality design verification for IPs, subsystems, or full SoCs, contributing to project success.
• Evaluate, recommend, and implement Tools, Flows, and Methodologies to address and resolve critical issues in current ASIC and SoC design and verification processes.
• Drive process improvements by prototyping and deploying new tools within hardware development projects, delivering a positive impact on Google's chip execution efficiency.
• Serve as a key technical liaison, performing or guiding technical evaluations of commercial Electronic Design Automation (EDA) tools, and building relationships with EDA partners to influence product roadmaps aligned with Google’s strategic needs.