New offer - be the first one to apply!
September 20, 2025
Senior • On-site
$232,000 - $368,000/yr
Santa Clara, CA , +1
Today, we are tapping into the unlimited potential of AI to define the next era of computing. An era in which NVIDIA’s GPUs act as the brains of computers, robots, and self-driving cars that can understand the world. Doing what has never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you will be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Come join our dynamic team and see how you can make a lasting impact on the world! The fusion of EDA, GPUs, and AI is forging a new kind of Moore’s Law—one where the fastest hardware and most advanced applications converge to amplify the ingenuity of their designers to accelerate progress even further.
NVIDIA has long developed advanced internal EDA tools to optimize our chips beyond the limits of external EDA. Combined with our preeminence in GPU computing and ample resources for AI realization, we offer an ideal environment for highly innovative EDA software architects to see their ideas transform the industry. For this role, we are particularly looking for backgrounds in IR drop, timing, and power modeling for VLSI physical design optimization tools. Top candidates will combine this with expertise in parallel computing and efficient memory management needed for practical GPU algorithm development. Success will come from our united vision to rearchitect EDA from the ground up around extreme parallelism and our collective grit to demonstrate it in production silicon that will redefine accelerated computing.
What you’ll be doing:
Invent algorithms for rapidly estimating voltage IR drop, timing, and power in CUDA as part of a suite of internal EDA tools for gate-level performance optimization.
Develop scalable cell current modeling techniques for detailed IR simulation on GPUs.
Research and develop strategies to more efficiently deploy EDA algorithms on GPUs, such as using compact approximations, lossy compression, and dynamic partitioning.
Collaborate with other developers to extend CUDA deployment into other VLSI domains, such as placement, routing, extraction, timing, logic simulation, SPICE, and DRCs.
This is a broad, flexible, hands-on software development role that can evolve as new opportunities are discovered and your personal interests grow.
What we need to see:
MS, PhD, or equivalent experience in Electrical Engineering, Computer Science, Physics, or Mathematics.
12+ years’ experience, including extensive use of C++ and parallel computing.
Expertise with timing and power modeling techniques commonly used in VLSI, such as Liberty CCS (Composite Current Source) models, moment analysis, Bayesian networks, and frequency domain analysis.
Strong understanding of VLSI physical design, including power grids, IR drop, place and route, static timing analysis, and dynamic power calculation.
Experience with CUDA packages, especially NVIDIA’s cuDSS (CUDA Direct Sparse Solver) library, cuBLAS, and/or cuSPARSE.
Ways to stand out from the crowd:
Familiarity with industry standard power integrity tools, such as Ansys RedHawk/SeaHawk.
Background with machine learning for VLSI, especially use of GNNs (Graph Neural Networks) or PINNs (Physics-Informed Neural Networks).
Familiarity with modern C++17/C++14 concepts and usage.
Expertise in other EDA components well-suited for GPU acceleration, including computational geometry, detailed physical design, SPICE, and functional simulation.
NVIDIA is widely considered to be one of the technology world’s most desirable employers, and due to outstanding success, our teams are rapidly growing. Are you passionate about joining a best-in-class team driving the latest in EDA, GPU, and AI technology? If so, we want to hear from you!
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD.You will also be eligible for equity and benefits.