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September 19, 2025

Central Processing Unit Physical Design Implementation Engineer - Mountain View Physical Design Implementation Engineer

Mid • On-site

$113,000 - $161,000/yr

Mountain View, CA

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience in high-speed design, including implementation and power performance area (PPA) leveraging industry-standard toolsets.
  • Experience in one or more sign-off convergence in areas like Static Timing Analysis (STA) electrical checks and physical verification domains.

Preferred qualifications:

  • Experience in the delivery of high performance silicon in latest technology process nodes.
  • Experience in using Static Timing Analysis, power grid network delivery and power analysis tools.
  • Experience in extraction of design parameters, Quality of Results metrics and analyzing data trends.
  • Knowledge of CPU including critical iterations for timing and low power microarchitecture and implementation techniques for CPUs.
  • Ability to analyze and resolve timing problems at a foundational level and also to use a multitude of physical techniques to implement broader solutions.
  • Excellent scripting and data mining skills.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

The team is working on Custom CPU design to push performance, power for Pixel SoCs. Custom CPUs pose a unique challenge for mobile devices and extracting the best performance is a big challenge for Physical design. This would attract top talent that are seeking challenging roles and to work at Google!

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $113,000-$161,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Work closely with Front-end and Architecture to drive architectural feasibility studies, identify power-performance-area trade-offs for physical design closure.
  • Drive block/IP physical design implementation and drive continuous PPA improvements through synthesis and PnR trials. Work in a tight loop with RTL designers to debug timing paths, leverage knowledge of design and physical design techniques to drive best implementation choices.
  • Develop physical design methodologies by bringing the best out of industry standard Electronic Design Automation (EDA) Tools and developing design customizations for implementation.
  • Work on signoff areas such as STA and Electrical Checks.
  • Be a highly-valued member of the physical design team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams