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August 28, 2025

Senior Silicon Validation Engineer

Senior • On-site

$156,000 - $229,000/yr

Mountain View, CA

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience developing random stress tests, silicon validation frameworks, or related infrastructure
  • Experience in verifying SoC blocks like CPU subsystem, memory subsystem, debug and trace, security.
  • Experience with programming in C/C++/assembly and with scripting in Python/Perl/Tcl.

Preferred qualifications:

  • Experience executing tests on emulation platforms or FPGA.
  • Experience with system debug, embedded operating systems, or bare metal programming.
  • Experience with Joint Test Action Group (JTAG) debuggers (e.g. Lauterbach).
  • Experience with Audio/sensors/low power validation.
  • Experience with Post Silicon debug.
  • Knowledge of CPU architectures, ARM, HW/SW interface, and debugging skills.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will develop high performance and low power hardware to enable Google’s continuous innovations in this space and will be a key member of the cross-functional silicon validation team responsible for ensuring that we deliver high-quality silicon to all internal customers, thereby providing differentiating customer experiences. You will plan, write, and execute tests to establish functional health of our systems on chips (SoCs), both under nominal and Production Verification Testing (PVT) conditions. You will lead the laboratory debug of failures with cross-functional teams (e.g., Silicon, Boards, Software, and Manufacturing). You will measure and optimize performance and power of silicon, enabling consistent and compelling use-cases in our end-products and will provide regular updates about Silicon health to platform, software and volume manufacturing teams.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Plan, develop, and execute tests to validate hardware IP blocks and integration at the system level.
  • Validate design on pre-silicon and post-silicon platforms.
  • Interface with Software, Architecture, Design, and DV teams to create test plans.
  • Support silicon debug and field failures