EMIR Sign-off, Flow and Methodology Engineer, Cloud

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 5 years of technical experience in physical design disciplines involving power delivery and advanced process technology nodes.
• Experience with power grid integrity (EMIR) from budgeting to analysis to verification and signoff.
• Experience using EMIR tools (e.g., RedHawk-SC, Totem, Voltus).

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience owning EMIR at the block or full-chip level, including proactive floorplanning and defining standard cell usage with physical design owners.
• Experience establishing EMIR budgets, defining signoff methodologies, and bringing up EMIR flows for new projects.
• Experience with power delivery voltage droop mitigation
• Familiarity with low power design techniques (e.g., multiple threshold voltage/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).

About the job

In this role, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing and mission-mode operation. You will work to shape the machinery that goes into our data centers affecting millions of Google users.

The team owns tool vendor interactions, flows, methodology and margins for both static and dynamic power integrity and power and signal Electromigration (EM). The teams purview extends beyond the die including interactions with system, board, package and everything in between. The broad exposure, insight and opportunity the team provides is an unique opportunity available at Google/CI2.

The ML, Systems, and Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Drive Electromigration and IR Drop (EMIR) analysis at the block, sub-chip and full-chip levels, including running signoff checks.
• Collaborate with physical design tool/flow owners on EMIR mitigation strategies such proactive floorplanning and optimal selection of standard cells.
• Collaborate with the physical design, strategy and technology acceleration (STA), package, and circuit/technology teams to define project EMIR budgets, margins and signoff methodologies.
• Work with internal teams and external vendors to bring up EMIR tools (e.g., RedHawk-SC, Totem, Voltus) for new projects.
• Contribute to flows, checkers, reporting and any tooling around signoff.