Senior Silicon Debug and Validation Engineer

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  
• 5 years of experience with silicon bring-up or validation.
• Experience with silicon design, hardware protocols and related simulation.
• Experience with programming language in C, and with computer architecture.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  
• Experience with software debug tools (GDB) or hardware debug tools (JTAG/TRACE32).
• Experience developing silicon validation tests and debugging post-silicon issues.
• Experience with Android, Embedded Linux, RTOSes or bare metal software.
• Knowledge of waveform.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Debug post-silicon error to support the silicon volume ramp at the system level.
• Collaborate with design and validation which will lead to the root cause of failure.
• Collaborate with internal test engineers, partner engineers, and contract manufacturers on screening parts, debugging RMAs, signing off on releases.
• Collect the post-silicon characterization data to improve the production quality and yield.