Staff Signal Integrity Engineer, Platforms

Minimum qualifications:

• Master's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  
• 6 years of experience working in a signal integrity technical environment, or 5 years of experience with an advanced degree.
• 3 years of experience in technical leadership.
  

Preferred qualifications:

• PhD in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  
• Experience with Allegro, HFSS, SIwave, ADS, Matlab, PowerDC, PowerSI.
• Experience with the product development process for mass volume production design, with a focus on signal integrity, power integrity and lab validation.
• Experience with PCIE, DDR, SATA, Ethernet standards, PCB, connector, and/or cable design and assembly processes, including materials and component selection.
• Experience in a lab environment with SerDes testing. Understanding of SERDES capabilities.
• Experience in scripting for data collection and analysis (e.g., Python, bash). Understanding of FEC and its implications for system design.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by custom hardware designed and made in-house.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $174,000-$258,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

• Lead System SI design on data center hardware products.
• Collaborate with board, chip and system engineers, design partners, and chip vendors, to drive system SI design, explore layout and manufacturability tradeoffs, and ensure that product functions as required. 
• Drive Application-Specific Integrated Circuit (ASIC), package, board, connector, and cable vendors to develop new interconnect technologies.
• Participate in system interconnects bring up and qualification, work with test engineers and include configuring chips to ensure adequate margin.
• Drive solutions for SI issues with design engineers, PCB designers, and system team. Run trade-off analysis on performance and cost.