March 9, 2025
Mid • On-site
$150,000 - $223,000/yr
Mountain View, CA , +1
In this role, you will contribute your ASIC architecture in hardware solutions for Camera ISP, Video, TPU, GPU and Display IP. You will collaborate with Camera, Video, Display, Machine Learning Algorithm teams to architect power, performance, area and IQ engaged hardware IP solutions and develop the architecture specifications used by the hardware IP design teams to implement the solutions within the SoC. You will work cross-functionally with many teams across Google to define engaged and differentiating user experiences on Google hardware devices and drive these user experiences into Google silicon.
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.