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In this highly visible role, you will be at the center of a chip design effort interfacing with many disciplines, with a critical impact on getting functional products to millions of customers quickly. You will be a member of a silicon timing characterization team. In this highly cross disciplinary role you will execute tasks that contribute to debugging physical issues in silicon and correlating silicon timing behavior with pre-silicon models.
Description
• Create and refine methodologies for isolating and debugging timing failures in system and on tester
• Develop, modify and deploy tests on silicon as part of characterization plan
• Analyze silicon parametric data and correlate with empirical observation
• Maintain and improve infrastructure for gathering silicon parametric data at scale
• Work with partner teams e.g. DFT, physical implementation, logic design to debug issues and improve methodology
• Enhance existing silicon debug features and conceive of new ones
Minimum Qualifications
- Minimum BS and 10+ years of relevant industry experience
- CMOS/VLSI design/analysis experience
- Experience with static timing analysis and silicon correlation
Preferred Qualifications
- Data analysis skills and experience using Python/JMP
- Grasp of structural test (ATPG, MBIST) methods is highly desirable
- Proven ability to lead a broad team towards successful closure on timing debug issues
- Excellent teamwork and communication. Ability to work with multiple teams in delivering a solution
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.
